diff options
| author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
| commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
| tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /cpu/mcf532x/cpu_init.c | |
| parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
| parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
| download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 | |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/mcf532x/cpu_init.c')
| -rw-r--r-- | cpu/mcf532x/cpu_init.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c index 93086f7..d348e29 100644 --- a/cpu/mcf532x/cpu_init.c +++ b/cpu/mcf532x/cpu_init.c @@ -63,46 +63,46 @@ void cpu_init_f(void) /* Port configuration */ gpio->par_cs = 0; -#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL)) - fbcs->csar0 = CFG_CS0_BASE; - fbcs->cscr0 = CFG_CS0_CTRL; - fbcs->csmr0 = CFG_CS0_MASK; +#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL)) + fbcs->csar0 = CONFIG_SYS_CS0_BASE; + fbcs->cscr0 = CONFIG_SYS_CS0_CTRL; + fbcs->csmr0 = CONFIG_SYS_CS0_MASK; #endif -#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL)) +#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL)) /* Latch chipselect */ gpio->par_cs |= GPIO_PAR_CS1; - fbcs->csar1 = CFG_CS1_BASE; - fbcs->cscr1 = CFG_CS1_CTRL; - fbcs->csmr1 = CFG_CS1_MASK; + fbcs->csar1 = CONFIG_SYS_CS1_BASE; + fbcs->cscr1 = CONFIG_SYS_CS1_CTRL; + fbcs->csmr1 = CONFIG_SYS_CS1_MASK; #endif -#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL)) +#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL)) gpio->par_cs |= GPIO_PAR_CS2; - fbcs->csar2 = CFG_CS2_BASE; - fbcs->cscr2 = CFG_CS2_CTRL; - fbcs->csmr2 = CFG_CS2_MASK; + fbcs->csar2 = CONFIG_SYS_CS2_BASE; + fbcs->cscr2 = CONFIG_SYS_CS2_CTRL; + fbcs->csmr2 = CONFIG_SYS_CS2_MASK; #endif -#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL)) +#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL)) gpio->par_cs |= GPIO_PAR_CS3; - fbcs->csar3 = CFG_CS3_BASE; - fbcs->cscr3 = CFG_CS3_CTRL; - fbcs->csmr3 = CFG_CS3_MASK; + fbcs->csar3 = CONFIG_SYS_CS3_BASE; + fbcs->cscr3 = CONFIG_SYS_CS3_CTRL; + fbcs->csmr3 = CONFIG_SYS_CS3_MASK; #endif -#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL)) +#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL)) gpio->par_cs |= GPIO_PAR_CS4; - fbcs->csar4 = CFG_CS4_BASE; - fbcs->cscr4 = CFG_CS4_CTRL; - fbcs->csmr4 = CFG_CS4_MASK; + fbcs->csar4 = CONFIG_SYS_CS4_BASE; + fbcs->cscr4 = CONFIG_SYS_CS4_CTRL; + fbcs->csmr4 = CONFIG_SYS_CS4_MASK; #endif -#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL)) +#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL)) gpio->par_cs |= GPIO_PAR_CS5; - fbcs->csar5 = CFG_CS5_BASE; - fbcs->cscr5 = CFG_CS5_CTRL; - fbcs->csmr5 = CFG_CS5_MASK; + fbcs->csar5 = CONFIG_SYS_CS5_BASE; + fbcs->cscr5 = CONFIG_SYS_CS5_CTRL; + fbcs->csmr5 = CONFIG_SYS_CS5_MASK; #endif #ifdef CONFIG_FSL_I2C @@ -125,7 +125,7 @@ void uart_port_conf(void) volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; /* Setup Ports: */ - switch (CFG_UART_PORT) { + switch (CONFIG_SYS_UART_PORT) { case 0: gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0); break; |