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| author | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2008-06-06 10:48:31 -0500 |
| commit | 1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch) | |
| tree | 9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /cpu/mcf52x2 | |
| parent | 2c289e320dcfb3760e99cf1d765cb067194a1202 (diff) | |
| parent | 8155efbd7ae9c65564ca98affe94631d612ae088 (diff) | |
| download | u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.zip u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.gz u-boot-imx-1a247ba7fa5fb09f56892a09a990f03ce564b3e2.tar.bz2 | |
Merge commit 'wd/master'
Diffstat (limited to 'cpu/mcf52x2')
| -rw-r--r-- | cpu/mcf52x2/start.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 2bc0df3..a054904 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -248,14 +248,14 @@ relocate_code: * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ - move.l %a0, %a1 + move.l %a0, %a1 add.l #(in_ram - CFG_MONITOR_BASE), %a1 jmp (%a1) in_ram: clear_bss: - /* + /* * Now clear BSS segment */ move.l %a0, %a1 @@ -416,7 +416,7 @@ icache_enable: * Note: The 5249 Documentation doesn't give a bit position for CINV! * From the 5272 and the 5307 documentation, I have deduced that it is * probably CACR[24]. Should someone say something to Motorola? - * ~Jeremy + * ~Jeremy */ move.l #0x01000000, %d0 /* Invalidate whole cache */ move.c %d0,%CACR |