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| author | TsiChung Liew <Tsi-Chung.Liew@freescale.com> | 2008-08-19 03:01:19 +0600 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2008-08-28 09:16:54 -0600 |
| commit | eec567a67e00d1ed8d941e9098b7d421f4091abf (patch) | |
| tree | dedad365b22f5893a7483d5bd3549ab61b8a166d /cpu/mcf52x2 | |
| parent | d53cf6a9c7423cba668b867978648645f71c3090 (diff) | |
| download | u-boot-imx-eec567a67e00d1ed8d941e9098b7d421f4091abf.zip u-boot-imx-eec567a67e00d1ed8d941e9098b7d421f4091abf.tar.gz u-boot-imx-eec567a67e00d1ed8d941e9098b7d421f4091abf.tar.bz2 | |
ColdFire: I2C fix for multiple platforms
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'cpu/mcf52x2')
| -rw-r--r-- | cpu/mcf52x2/cpu_init.c | 12 | ||||
| -rw-r--r-- | cpu/mcf52x2/speed.c | 8 |
2 files changed, 19 insertions, 1 deletions
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 3cacb55..68aefe9 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -80,6 +80,15 @@ void cpu_init_f(void) mbar_writeShort(MCFSIM_CSCR0, CFG_CSCR0); mbar_writeLong(MCFSIM_CSMR0, CFG_CSMR0); +#ifdef CONFIG_FSL_I2C + CFG_I2C_PINMUX_REG = CFG_I2C_PINMUX_REG & CFG_I2C_PINMUX_CLR; + CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET; +#ifdef CFG_I2C2_OFFSET + CFG_I2C2_PINMUX_REG &= CFG_I2C2_PINMUX_CLR; + CFG_I2C2_PINMUX_REG |= CFG_I2C2_PINMUX_SET; +#endif +#endif + /* enable instruction cache now */ icache_enable(); } @@ -322,7 +331,8 @@ void cpu_init_f(void) #endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */ #ifdef CONFIG_FSL_I2C - gpio_reg->par_feci2c = 0x000F; + CFG_I2C_PINMUX_REG &= CFG_I2C_PINMUX_CLR; + CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET; #endif /* enable instruction cache now */ diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index f6edd5b..4cb8f93 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -82,5 +82,13 @@ int get_clocks (void) #else gd->bus_clk = gd->cpu_clk; #endif + +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#ifdef CFG_I2C2_OFFSET + gd->i2c2_clk = gd->bus_clk; +#endif +#endif + return (0); } |