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| author | Stefan Roese <sr@denx.de> | 2007-08-18 14:33:02 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-08-18 14:33:02 +0200 |
| commit | 8280f6a1c43247616b68224675188e5ccd124650 (patch) | |
| tree | 1bfd0f89a9fd5c69e5b717bb7746068dd426e495 /cpu/mcf52x2 | |
| parent | 4a442d3186b31893b4f77c6e82f63c4517a5224b (diff) | |
| download | u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.zip u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.tar.gz u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.tar.bz2 | |
Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/mcf52x2')
| -rw-r--r-- | cpu/mcf52x2/cpu_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index f41d77b..458b85e 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -63,7 +63,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* * Setup chip selects... |