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author | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:59:26 -0700 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:59:26 -0700 |
commit | 1aeed8d71acb3290cf2446f316d6ba437e7881c4 (patch) | |
tree | 475d54d2773652e6103291bfdd63d9c27b68a0a8 /cpu/mcf52x2 | |
parent | 8c8428a576f632745306e288b629e30d420c0f5a (diff) | |
download | u-boot-imx-1aeed8d71acb3290cf2446f316d6ba437e7881c4.zip u-boot-imx-1aeed8d71acb3290cf2446f316d6ba437e7881c4.tar.gz u-boot-imx-1aeed8d71acb3290cf2446f316d6ba437e7881c4.tar.bz2 |
Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/mcf52x2')
-rw-r--r-- | cpu/mcf52x2/speed.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index 85a5c4d..5fafcd8 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -67,11 +67,13 @@ int get_clocks (void) #if defined(CONFIG_M5275) volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL); - /* Setup PLL */ - pll->syncr = 0x01080000; - while (!(pll->synsr & FMPLL_SYNSR_LOCK)); - pll->syncr = 0x01000000; - while (!(pll->synsr & FMPLL_SYNSR_LOCK)); + /* Setup PLL */ + pll->syncr = 0x01080000; + while (!(pll->synsr & FMPLL_SYNSR_LOCK) + ; + pll->syncr = 0x01000000; + while (!(pll->synsr & FMPLL_SYNSR_LOCK)) + ; #endif gd->cpu_clk = CFG_CLK; |