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authorStefan Roese <sr@denx.de>2006-09-18 10:48:03 +0200
committerStefan Roese <sr@denx.de>2006-09-18 10:48:03 +0200
commit64cd52efd1dc51a4a5a0cf10efe5362fab27de29 (patch)
tree64e046a7d8b2f0106bc387dd032734ad963f4e68 /cpu/mcf52x2/start.S
parent899620c2d66d4eef3b2a0034d062e71d45d886c9 (diff)
parent854bc8da75709f13dab4cfa6e9094c0cb49b5c5a (diff)
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Merge with /home/stefan/git/u-boot/denx
Diffstat (limited to 'cpu/mcf52x2/start.S')
-rw-r--r--cpu/mcf52x2/start.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 8a83ca5..f1f4077 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -140,6 +140,7 @@ _start:
move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
move.l %d0, 0x40000000
+#if defined(CONFIG_M5282)
/* Initialize RAMBAR1: locate SRAM and validate it */
move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
movec %d0, %RAMBAR1
@@ -171,6 +172,7 @@ _after_flashbar_copy:
#endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
#endif
+#endif
/* if we come from a pre-loader we have no exception table and
* therefore no VBR to set
*/