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| author | Marian Balakowicz <m8@semihalf.com> | 2006-05-09 11:51:51 +0200 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2006-05-09 11:51:51 +0200 |
| commit | 6f5155a95cc6d4b80cda10785c64a55fbb18e8ee (patch) | |
| tree | c690fefe017b60bdd9fad2b344fecd8898264547 /cpu/mcf52x2/start.S | |
| parent | b75ef85f42f75206a9a2c278c042e911c92ea28c (diff) | |
| download | u-boot-imx-6f5155a95cc6d4b80cda10785c64a55fbb18e8ee.zip u-boot-imx-6f5155a95cc6d4b80cda10785c64a55fbb18e8ee.tar.gz u-boot-imx-6f5155a95cc6d4b80cda10785c64a55fbb18e8ee.tar.bz2 | |
Make R5200 specific low level initialization board conditional.
Diffstat (limited to 'cpu/mcf52x2/start.S')
| -rw-r--r-- | cpu/mcf52x2/start.S | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 8ae9591..3ab812b 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -55,7 +55,7 @@ */ _vectors: -#ifndef CONFIG_M5271 +#ifndef CONFIG_R5200 .long 0x00000000, _START #else .long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */ @@ -142,7 +142,9 @@ _start: /* Initialize RAMBAR1: locate SRAM and validate it */ move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0 movec %d0, %RAMBAR1 -#ifdef CONFIG_M5271 +#endif + +#ifdef CONFIG_R5200 move.l #(_flash_setup-CFG_FLASH_BASE), %a0 move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1 move.l #(CFG_INIT_RAM_ADDR), %a2 @@ -150,8 +152,6 @@ _copy_flash: move.l (%a0)+, (%a2)+ cmp.l %a0, %a1 bgt.s _copy_flash -#endif - jmp CFG_INIT_RAM_ADDR _after_flash_copy: #endif @@ -174,18 +174,24 @@ _after_flash_copy: bsr cpu_init_f /* run low-level CPU init code (from flash) */ bsr board_init_f /* run low-level board init code (from flash) */ - /* board_init_f() does not return + /* board_init_f() does not return */ /*------------------------------------------------------------------------------*/ -#ifdef CONFIG_M5271 +#ifdef CONFIG_R5200 _flash_setup: - move.l #0x1000, %d0 + /* CSAR0 */ + move.l #((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0 move.w %d0, 0x40000080 - move.l #0x2180, %d0 + + /* CSCR0 */ + move.l #0x2180, %d0 /* 8 wait states, 16bit port, auto ack, */ move.w %d0, 0x4000008A - move.l #0x3f0001, %d0 + + /* CSMR0 */ + move.l #0x001f0001, %d0 /* 2 MB, valid */ move.l %d0, 0x40000084 + jmp _after_flash_copy.L _flash_setup_end: #endif |