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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-06-10 19:27:47 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.denx.de> | 2006-06-10 19:27:47 +0200 |
| commit | 4176c799645d8b35224345d899006993397635c1 (patch) | |
| tree | 9d82c0fbda16231fe4edefcbb4a9bc23d67c0de5 /cpu/mcf52x2/fec.c | |
| parent | 9d4d3e3833ca7f4dada190ddcb3fea1da9bb9b5b (diff) | |
| parent | 0e0ef590b263927a62d399dce0cf1b7aa8dee42e (diff) | |
| download | u-boot-imx-4176c799645d8b35224345d899006993397635c1.zip u-boot-imx-4176c799645d8b35224345d899006993397635c1.tar.gz u-boot-imx-4176c799645d8b35224345d899006993397635c1.tar.bz2 | |
Merge with /home/hs/U-Boot/u-boot-dev
Diffstat (limited to 'cpu/mcf52x2/fec.c')
| -rw-r--r-- | cpu/mcf52x2/fec.c | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c index f207dd6..702563d 100644 --- a/cpu/mcf52x2/fec.c +++ b/cpu/mcf52x2/fec.c @@ -205,7 +205,9 @@ int eth_rx (void) int eth_init (bd_t * bd) { - +#ifndef CFG_ENET_BD_BASE + DECLARE_GLOBAL_DATA_PTR; +#endif int i; volatile fec_t *fecp = (fec_t *) (FEC_ADDR); @@ -258,6 +260,10 @@ int eth_init (bd_t * bd) #else /* Clear multicast address hash table */ +#ifdef CONFIG_M5282 + fecp->fec_ihash_table_high = 0; + fecp->fec_ihash_table_low = 0; +#else fecp->fec_hash_table_high = 0; fecp->fec_hash_table_low = 0; #endif @@ -273,7 +279,16 @@ int eth_init (bd_t * bd) txIdx = 0; if (!rtx) { +#ifdef CFG_ENET_BD_BASE rtx = (RTXBD *) CFG_ENET_BD_BASE; +#else + rtx = (RTXBD *) (CFG_MONITOR_BASE+gd->reloc_off - + (((PKTBUFSRX+TX_BUF_CNT)*+sizeof(cbd_t) + +0xFF) + & ~0xFF) + ); + debug("set ENET_DB_BASE to %lX\n",(long) rtx); +#endif } /* @@ -307,18 +322,18 @@ int eth_init (bd_t * bd) /* Enable MII mode */ -#if 0 /* Full duplex mode */ + +#if 0 /* Full duplex mode */ fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; -#else /* Half duplex mode */ - fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; -#ifdef CONFIG_M5271 - fecp->fec_r_cntrl |= (PKT_MAXBUF_SIZE << 16); /* set max frame length */ -#endif +#else /* Half duplex mode */ + fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE << 16); /* set max frame length */ + fecp->fec_r_cntrl |= FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; fecp->fec_x_cntrl = 0; #endif /* Set MII speed */ - fecp->fec_mii_speed = 0x0e; + fecp->fec_mii_speed = (((CFG_CLK / 2) / (2500000 / 10)) + 5) / 10; + fecp->fec_mii_speed *= 2; /* Configure port B for MII. */ @@ -422,7 +437,7 @@ static void mii_discover_phy (void) */ udelay (10000); /* wait 10ms */ } - for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) { + for (phyno = 1; phyno < 32 && phyaddr < 0; ++phyno) { phytype = mii_send (mk_mii_read (phyno, PHY_PHYIDR1)); #ifdef ET_DEBUG printf ("PHY type 0x%x pass %d type ", phytype, pass); |