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author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-08-16 19:23:50 -0500 |
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committer | John Rigby <jrigby@freescale.com> | 2007-08-17 11:36:29 -0600 |
commit | 4a442d3186b31893b4f77c6e82f63c4517a5224b (patch) | |
tree | 7f0ad1c0464cbeeee6b3db4ccf9d7204d5d9819f /cpu/mcf523x/interrupts.c | |
parent | 8ae158cd87a4a25722b27835261b6ff0fa2aa6a7 (diff) | |
download | u-boot-imx-4a442d3186b31893b4f77c6e82f63c4517a5224b.zip u-boot-imx-4a442d3186b31893b4f77c6e82f63c4517a5224b.tar.gz u-boot-imx-4a442d3186b31893b4f77c6e82f63c4517a5224b.tar.bz2 |
ColdFire: Add M5235EVB Platform for MCF523x
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'cpu/mcf523x/interrupts.c')
-rw-r--r-- | cpu/mcf523x/interrupts.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/cpu/mcf523x/interrupts.c b/cpu/mcf523x/interrupts.c new file mode 100644 index 0000000..125c53b --- /dev/null +++ b/cpu/mcf523x/interrupts.c @@ -0,0 +1,49 @@ +/* + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* CPU specific interrupt routine */ +#include <common.h> +#include <asm/immap.h> + +int interrupt_init(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + /* Make sure all interrupts are disabled */ + intp->imrl0 |= 0x1; + + enable_interrupts(); + return 0; +} + +#if defined(CONFIG_MCFTMR) +void dtimer_intr_setup(void) +{ + volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE); + + intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI; + intp->imrl0 &= ~INTC_IPRL_INT0; + intp->imrl0 &= ~CFG_TMRINTR_MASK; +} +#endif |