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authorwdenk <wdenk>2004-06-10 21:55:33 +0000
committerwdenk <wdenk>2004-06-10 21:55:33 +0000
commitf832d8a1432da791b94b820ccf2c7864708c5631 (patch)
tree6521bd856efe4951d6a17288ae02ab3c3ed6e7a4 /cpu/lh7a40x/speed.c
parentb54d32b40d95d399dd1f53f24c93b0cf5c42460d (diff)
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* Patch by Paul Ruhland, 10 Jun 2004:
fix support for Logic SDK-LH7A404 board and clean up the LH7A404 register macros. * Patch by Matthew McClintock, 10 Jun 2004: Modify code to select correct serial clock on Sandpoint8245
Diffstat (limited to 'cpu/lh7a40x/speed.c')
-rw-r--r--cpu/lh7a40x/speed.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/lh7a40x/speed.c b/cpu/lh7a40x/speed.c
index e80b046..333ebb5 100644
--- a/cpu/lh7a40x/speed.c
+++ b/cpu/lh7a40x/speed.c
@@ -46,7 +46,7 @@ ulong get_PLLCLK (void)
/* return FCLK frequency */
ulong get_FCLK (void)
{
- LH7A40X_CSC_PTR (csc);
+ lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
ulong maindiv1, maindiv2, prediv, ps;
/*
@@ -68,7 +68,7 @@ ulong get_FCLK (void)
/* return HCLK frequency */
ulong get_HCLK (void)
{
- LH7A40X_CSC_PTR (csc);
+ lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_FCLK () / ((csc->clkset & CLKSET_HCLKDIV) + 1));
}
@@ -76,7 +76,7 @@ ulong get_HCLK (void)
/* return PCLK frequency */
ulong get_PCLK (void)
{
- LH7A40X_CSC_PTR (csc);
+ lh7a40x_csc_t* csc = LH7A40X_CSC_PTR;
return (get_HCLK () /
(1 << (((csc->clkset & CLKSET_PCLKDIV) >> 16) + 1)));