summaryrefslogtreecommitdiff
path: root/cpu/leon3/cpu_init.c
diff options
context:
space:
mode:
authorMarkus Klotzbuecher <mk@denx.de>2008-10-21 09:18:01 +0200
committerMarkus Klotzbuecher <mk@denx.de>2008-10-21 09:18:01 +0200
commit50bd0057ba8fceeb48533f8b1a652ccd0e170838 (patch)
treeea1a183343573c2a48248923b96d316c0956727c /cpu/leon3/cpu_init.c
parent9dbc366744960013965fce8851035b6141f3b3ae (diff)
parentf82642e33899766892499b163e60560fbbf87773 (diff)
downloadu-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.zip
u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.tar.gz
u-boot-imx-50bd0057ba8fceeb48533f8b1a652ccd0e170838.tar.bz2
Merge git://git.denx.de/u-boot into x1
Conflicts: drivers/usb/usb_ohci.c
Diffstat (limited to 'cpu/leon3/cpu_init.c')
-rw-r--r--cpu/leon3/cpu_init.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu/leon3/cpu_init.c b/cpu/leon3/cpu_init.c
index 4fe7d4b..be22ec2 100644
--- a/cpu/leon3/cpu_init.c
+++ b/cpu/leon3/cpu_init.c
@@ -159,9 +159,9 @@ int init_memory_ctrl()
mctrl = (ambapp_dev_mctrl *) base;
/* config MCTRL memory controller */
- mctrl->mcfg1 = CFG_GRLIB_MEMCFG1 | (mctrl->mcfg1 & 0x300);
- mctrl->mcfg2 = CFG_GRLIB_MEMCFG2;
- mctrl->mcfg3 = CFG_GRLIB_MEMCFG3;
+ mctrl->mcfg1 = CONFIG_SYS_GRLIB_MEMCFG1 | (mctrl->mcfg1 & 0x300);
+ mctrl->mcfg2 = CONFIG_SYS_GRLIB_MEMCFG2;
+ mctrl->mcfg3 = CONFIG_SYS_GRLIB_MEMCFG3;
not_found_mctrl = 0;
}
@@ -171,9 +171,9 @@ int init_memory_ctrl()
mctrl = (ambapp_dev_mctrl *) base;
/* config MCTRL memory controller */
- mctrl->mcfg1 = CFG_GRLIB_FT_MEMCFG1 | (mctrl->mcfg1 & 0x300);
- mctrl->mcfg2 = CFG_GRLIB_FT_MEMCFG2;
- mctrl->mcfg3 = CFG_GRLIB_FT_MEMCFG3;
+ mctrl->mcfg1 = CONFIG_SYS_GRLIB_FT_MEMCFG1 | (mctrl->mcfg1 & 0x300);
+ mctrl->mcfg2 = CONFIG_SYS_GRLIB_FT_MEMCFG2;
+ mctrl->mcfg3 = CONFIG_SYS_GRLIB_FT_MEMCFG3;
not_found_mctrl = 0;
}
@@ -183,7 +183,7 @@ int init_memory_ctrl()
sdctrl = (ambapp_dev_sdctrl *) base;
/* config memory controller */
- sdctrl->sdcfg = CFG_GRLIB_SDRAM;
+ sdctrl->sdcfg = CONFIG_SYS_GRLIB_SDRAM;
not_found_mctrl = 0;
}
@@ -192,8 +192,8 @@ int init_memory_ctrl()
ddr2spa = (ambapp_dev_ddr2spa *) ambapp_ahb_get_info(ahb, 1);
/* Config DDR2 memory controller */
- ddr2spa->cfg1 = CFG_GRLIB_DDR2_CFG1;
- ddr2spa->cfg3 = CFG_GRLIB_DDR2_CFG3;
+ ddr2spa->cfg1 = CONFIG_SYS_GRLIB_DDR2_CFG1;
+ ddr2spa->cfg3 = CONFIG_SYS_GRLIB_DDR2_CFG3;
not_found_mctrl = 0;
}
@@ -202,7 +202,7 @@ int init_memory_ctrl()
ddrspa = (ambapp_dev_ddrspa *) ambapp_ahb_get_info(ahb, 1);
/* Config DDR memory controller */
- ddrspa->ctrl = CFG_GRLIB_DDR_CFG;
+ ddrspa->ctrl = CONFIG_SYS_GRLIB_DDR_CFG;
not_found_mctrl = 0;
}