rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

7 files changed, 32 insertions, 32 deletions

diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c
index 2c7d5a0..402188e 100644
--- a/cpu/ixp/cpu.c
+++ b/cpu/ixp/cpu.c
@@ -81,7 +81,7 @@ int cpu_init (void)
 	 * setup up stacks if necessary
 	 */
 #ifdef CONFIG_USE_IRQ
-	IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
+	IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
 	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
 #endif
 
@@ -198,7 +198,7 @@ void pci_init(void)
 
 void bootcount_store (ulong a)
 {
-	volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+	volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
 
 	save_addr[0] = a;
 	save_addr[1] = BOOTCOUNT_MAGIC;
@@ -206,7 +206,7 @@ void bootcount_store (ulong a)
 
 ulong bootcount_load (void)
 {
-	volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+	volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
 
 	if (save_addr[1] != BOOTCOUNT_MAGIC)
 		return 0;
diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c
index 84fe937..621f31b 100644
--- a/cpu/ixp/interrupts.c
+++ b/cpu/ixp/interrupts.c
@@ -40,8 +40,8 @@
  */
 
 #define FREQ		66666666
-#define CLOCK_TICK_RATE	(((FREQ / CFG_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CFG_HZ)
-#define LATCH		((CLOCK_TICK_RATE + CFG_HZ/2) / CFG_HZ)	/* For divider */
+#define CLOCK_TICK_RATE	(((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
+#define LATCH		((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ)	/* For divider */
 
 struct _irq_handler {
 	void                *m_data;
diff --git a/cpu/ixp/npe/include/npe.h b/cpu/ixp/npe/include/npe.h
index e53458d..3d6f727 100644
--- a/cpu/ixp/npe/include/npe.h
+++ b/cpu/ixp/npe/include/npe.h
@@ -27,10 +27,10 @@
 /*
  * defines...
  */
-#define CFG_NPE_NUMS		1
+#define CONFIG_SYS_NPE_NUMS		1
 #ifdef CONFIG_HAS_ETH1
-#undef CFG_NPE_NUMS
-#define CFG_NPE_NUMS		2
+#undef CONFIG_SYS_NPE_NUMS
+#define CONFIG_SYS_NPE_NUMS		2
 #endif
 
 #define NPE_NUM_PORTS		3
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index 892096b..bd77fed 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -51,7 +51,7 @@ static int npe_exists[NPE_NUM_PORTS];
 static int npe_used[NPE_NUM_PORTS];
 
 /* A little extra so we can align to cacheline. */
-static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CFG_CACHELINE_SIZE - 1];
+static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CONFIG_SYS_CACHELINE_SIZE - 1];
 static u8 *npe_alloc_end;
 static u8 *npe_alloc_free;
 
@@ -60,7 +60,7 @@ static void *npe_alloc(int size)
 	static int count = 0;
 	void *p = NULL;
 
-	size = (size + (CFG_CACHELINE_SIZE-1)) & ~(CFG_CACHELINE_SIZE-1);
+	size = (size + (CONFIG_SYS_CACHELINE_SIZE-1)) & ~(CONFIG_SYS_CACHELINE_SIZE-1);
 	count++;
 
 	if ((npe_alloc_free + size) < npe_alloc_end) {
@@ -399,7 +399,7 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
 
 	npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 	npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-				 CFG_CACHELINE_SIZE - 1) & ~(CFG_CACHELINE_SIZE - 1));
+				 CONFIG_SYS_CACHELINE_SIZE - 1) & ~(CONFIG_SYS_CACHELINE_SIZE - 1));
 
 	/* initialize mbuf pool */
 	init_rx_mbufs(p_npe);
@@ -568,7 +568,7 @@ int npe_initialize(bd_t * bis)
 	int eth_num = 0;
 	struct npe *p_npe = NULL;
 
-	for (eth_num = 0; eth_num < CFG_NPE_NUMS; eth_num++) {
+	for (eth_num = 0; eth_num < CONFIG_SYS_NPE_NUMS; eth_num++) {
 
 		/* See if we can actually bring up the interface, otherwise, skip it */
 		switch (eth_num) {
@@ -673,8 +673,8 @@ int npe_initialize(bd_t * bis)
 
 			npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 			npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-						 CFG_CACHELINE_SIZE - 1)
-						& ~(CFG_CACHELINE_SIZE - 1));
+						 CONFIG_SYS_CACHELINE_SIZE - 1)
+						& ~(CONFIG_SYS_CACHELINE_SIZE - 1));
 
 			if (!npe_csr_load())
 				return 0;
diff --git a/cpu/ixp/serial.c b/cpu/ixp/serial.c
index 4549631..dd26af4 100644
--- a/cpu/ixp/serial.c
+++ b/cpu/ixp/serial.c
@@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 void serial_setbrg (void)
 {
 	unsigned int quot = 0;
-	int uart = CFG_IXP425_CONSOLE;
+	int uart = CONFIG_SYS_IXP425_CONSOLE;
 
 	if ((gd->baudrate <= SERIAL_CLOCK) && (SERIAL_CLOCK % gd->baudrate == 0))
 		quot = SERIAL_CLOCK / gd->baudrate;
@@ -85,9 +85,9 @@ int serial_init (void)
 void serial_putc (const char c)
 {
 	/* wait for room in the tx FIFO on UART */
-	while ((LSR(CFG_IXP425_CONSOLE) & LSR_TEMT) == 0);
+	while ((LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_TEMT) == 0);
 
-	THR(CFG_IXP425_CONSOLE) = c;
+	THR(CONFIG_SYS_IXP425_CONSOLE) = c;
 
 	/* If \n, also do \r */
 	if (c == '\n')
@@ -101,7 +101,7 @@ void serial_putc (const char c)
  */
 int serial_tstc (void)
 {
-	return LSR(CFG_IXP425_CONSOLE) & LSR_DR;
+	return LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_DR;
 }
 
 /*
@@ -111,9 +111,9 @@ int serial_tstc (void)
  */
 int serial_getc (void)
 {
-	while (!(LSR(CFG_IXP425_CONSOLE) & LSR_DR));
+	while (!(LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_DR));
 
-	return (char) RBR(CFG_IXP425_CONSOLE) & 0xff;
+	return (char) RBR(CONFIG_SYS_IXP425_CONSOLE) & 0xff;
 }
 
 void
diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S
index d4c8e33..196ba5d 100644
--- a/cpu/ixp/start.S
+++ b/cpu/ixp/start.S
@@ -154,7 +154,7 @@ reset:
 	CPWAIT	r0
 
 	/* set EXP CS0 to the optimum timing */
-	ldr	r1, =CFG_EXP_CS0
+	ldr	r1, =CONFIG_SYS_EXP_CS0
 	ldr     r2, =IXP425_EXP_CS0
 	str     r1, [r2]
 
@@ -165,7 +165,7 @@ reset:
 	orr     r1, r1, #0x80000000
 	str     r1, [r2]
 #endif
-	mov	r1, #CFG_SDR_CONFIG
+	mov	r1, #CONFIG_SYS_SDR_CONFIG
 	ldr     r2, =IXP425_SDR_CONFIG
 	str     r1, [r2]
 
@@ -181,7 +181,7 @@ reset:
 	DELAY_FOR 0x4000, r0
 
 	/* set SDRAM internal refresh val */
-	ldr	r1, =CFG_SDRAM_REFRESH_CNT
+	ldr	r1, =CONFIG_SYS_SDRAM_REFRESH_CNT
 	str     r1, [r3]
 	DELAY_FOR 0x4000, r0
 
@@ -199,7 +199,7 @@ reset:
 	bne	111b
 
 	/* set mode register in sdram */
-	mov	r1, #CFG_SDR_MODE_CONFIG
+	mov	r1, #CONFIG_SYS_SDR_MODE_CONFIG
 	str	r1, [r4]
 	DELAY_FOR 0x4000, r0
 
@@ -211,7 +211,7 @@ reset:
 	/* copy */
 	mov     r0, #0
 	mov     r4, r0
-	add     r2, r0, #CFG_MONITOR_LEN
+	add     r2, r0, #CONFIG_SYS_MONITOR_LEN
 	mov     r1, #0x10000000
 	mov     r5, r1
 
@@ -283,8 +283,8 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-	sub	r0, r0, #CFG_MALLOC_LEN	/* malloc area                      */
-	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
+	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN	/* malloc area                      */
+	sub	r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo                        */
 #ifdef CONFIG_USE_IRQ
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
@@ -345,8 +345,8 @@ _start_armboot: .word start_armboot
 	add	r8, sp, #S_PC
 
 	ldr	r2, _armboot_start
-	sub	r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
-	sub	r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
+	sub	r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
+	sub	r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
 	ldmia	r2, {r2 - r4}			/* get pc, cpsr, old_r0	    */
 	add	r0, sp, #S_FRAME_SIZE		/* restore sp_SVC	    */
 
@@ -382,8 +382,8 @@ _start_armboot: .word start_armboot
 
 	.macro get_bad_stack
 	ldr	r13, _armboot_start		@ setup our mode stack
-	sub	r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
-	sub	r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
+	sub	r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
+	sub	r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
 
 	str	lr, [r13]			@ save caller lr / spsr
 	mrs	lr, spsr
diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c
index 920f34e..09d8ad5 100644
--- a/cpu/ixp/timer.c
+++ b/cpu/ixp/timer.c
@@ -44,7 +44,7 @@ void ixp425_udelay(unsigned long usec)
 	 * This function has a max usec, but since it is called from udelay
 	 * we should not have to worry... be happy
 	 */
-	unsigned long usecs = CFG_HZ/1000000L & ~IXP425_OST_RELOAD_MASK;
+	unsigned long usecs = CONFIG_SYS_HZ/1000000L & ~IXP425_OST_RELOAD_MASK;
 
 	*IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
 	usecs |= IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;