diff options
author | Wolfgang Denk <wd@denx.de> | 2008-05-20 16:00:29 +0200 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-05-21 00:14:08 +0200 |
commit | 53677ef18e25c97ac613349087c5cb33ae5a2741 (patch) | |
tree | f947d34d6efaee2401ea0e4c6104ef2f6a0f7ad0 /cpu/ixp/start.S | |
parent | 727f63334676e760877d43bfb8f0e9331ac8b101 (diff) | |
download | u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.zip u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.tar.gz u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.tar.bz2 |
Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/ixp/start.S')
-rw-r--r-- | cpu/ixp/start.S | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/cpu/ixp/start.S b/cpu/ixp/start.S index 757cfaa..d4c8e33 100644 --- a/cpu/ixp/start.S +++ b/cpu/ixp/start.S @@ -140,7 +140,7 @@ reset: CPWAIT r0 /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* drain write and fill buffers */ @@ -160,22 +160,22 @@ reset: /* make sure flash is visible at 0 */ #if 0 - ldr r2, =IXP425_EXP_CFG0 + ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] orr r1, r1, #0x80000000 str r1, [r2] #endif - mov r1, #CFG_SDR_CONFIG + mov r1, #CFG_SDR_CONFIG ldr r2, =IXP425_SDR_CONFIG str r1, [r2] /* disable refresh cycles */ - mov r1, #0 + mov r1, #0 ldr r3, =IXP425_SDR_REFRESH str r1, [r3] /* send nop command */ - mov r1, #3 + mov r1, #3 ldr r4, =IXP425_SDR_IR str r1, [r4] DELAY_FOR 0x4000, r0 @@ -226,7 +226,7 @@ reset: CPWAIT r0 /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* drain write and fill buffers */ @@ -234,7 +234,7 @@ reset: CPWAIT r0 /* move flash to 0x50000000 */ - ldr r2, =IXP425_EXP_CFG0 + ldr r2, =IXP425_EXP_CFG0 ldr r1, [r2] bic r1, r1, #0x80000000 str r1, [r2] @@ -247,7 +247,7 @@ reset: nop /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 + mcr p15, 0, r0, c8, c7, 0 CPWAIT r0 /* enable I cache */ @@ -293,7 +293,7 @@ stack_setup: clear_bss: ldr r0, _bss_start /* find start of bss segment */ ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ + mov r2, #0x00000000 /* clear */ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 @@ -482,13 +482,13 @@ fiq: .globl reset_cpu reset_cpu: - ldr r1, =0x482e + ldr r1, =0x482e ldr r2, =IXP425_OSWK str r1, [r2] - ldr r1, =0x0fff + ldr r1, =0x0fff ldr r2, =IXP425_OSWT str r1, [r2] - ldr r1, =0x5 + ldr r1, =0x5 ldr r2, =IXP425_OSWE str r1, [r2] b reset_endless |