Merge branch 'fixes' into cleanups

Conflicts:

	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h

4 files changed, 10 insertions, 12 deletions

diff --git a/cpu/ixp/npe/include/IxEthDB_p.h b/cpu/ixp/npe/include/IxEthDB_p.h
index e7c67ae..ccec7ea 100644
--- a/cpu/ixp/npe/include/IxEthDB_p.h
+++ b/cpu/ixp/npe/include/IxEthDB_p.h
@@ -193,8 +193,6 @@ extern int overflowEvent;
 #define LEFT  (-1)
 
 /* macros */
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-
 #define IX_ETH_DB_CHECK_PORT_EXISTS(portID) \
 { \
     if ((portID) >= IX_ETH_DB_NUMBER_OF_PORTS) \
diff --git a/cpu/ixp/npe/include/npe.h b/cpu/ixp/npe/include/npe.h
index e53458d..3d6f727 100644
--- a/cpu/ixp/npe/include/npe.h
+++ b/cpu/ixp/npe/include/npe.h
@@ -27,10 +27,10 @@
 /*
  * defines...
  */
-#define CFG_NPE_NUMS		1
+#define CONFIG_SYS_NPE_NUMS		1
 #ifdef CONFIG_HAS_ETH1
-#undef CFG_NPE_NUMS
-#define CFG_NPE_NUMS		2
+#undef CONFIG_SYS_NPE_NUMS
+#define CONFIG_SYS_NPE_NUMS		2
 #endif
 
 #define NPE_NUM_PORTS		3
diff --git a/cpu/ixp/npe/miiphy.c b/cpu/ixp/npe/miiphy.c
index c63c54e..20fee2d 100644
--- a/cpu/ixp/npe/miiphy.c
+++ b/cpu/ixp/npe/miiphy.c
@@ -32,7 +32,7 @@
   |  Date	 Description of Change					     BY
   |  ---------	 ---------------------					     ---
   |  05-May-99	 Created						     MKW
-  |  01-Jul-99	 Changed clock setting of sta_reg from 66Mhz to 50Mhz to
+  |  01-Jul-99	 Changed clock setting of sta_reg from 66MHz to 50MHz to
   |		 better match OPB speed. Also modified delay times.	     JWB
   |  29-Jul-99	 Added Full duplex support				     MKW
   |  24-Aug-99	 Removed printf from dp83843_duplex()			     JWB
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index 892096b..bd77fed 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -51,7 +51,7 @@ static int npe_exists[NPE_NUM_PORTS];
 static int npe_used[NPE_NUM_PORTS];
 
 /* A little extra so we can align to cacheline. */
-static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CFG_CACHELINE_SIZE - 1];
+static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CONFIG_SYS_CACHELINE_SIZE - 1];
 static u8 *npe_alloc_end;
 static u8 *npe_alloc_free;
 
@@ -60,7 +60,7 @@ static void *npe_alloc(int size)
 	static int count = 0;
 	void *p = NULL;
 
-	size = (size + (CFG_CACHELINE_SIZE-1)) & ~(CFG_CACHELINE_SIZE-1);
+	size = (size + (CONFIG_SYS_CACHELINE_SIZE-1)) & ~(CONFIG_SYS_CACHELINE_SIZE-1);
 	count++;
 
 	if ((npe_alloc_free + size) < npe_alloc_end) {
@@ -399,7 +399,7 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
 
 	npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 	npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-				 CFG_CACHELINE_SIZE - 1) & ~(CFG_CACHELINE_SIZE - 1));
+				 CONFIG_SYS_CACHELINE_SIZE - 1) & ~(CONFIG_SYS_CACHELINE_SIZE - 1));
 
 	/* initialize mbuf pool */
 	init_rx_mbufs(p_npe);
@@ -568,7 +568,7 @@ int npe_initialize(bd_t * bis)
 	int eth_num = 0;
 	struct npe *p_npe = NULL;
 
-	for (eth_num = 0; eth_num < CFG_NPE_NUMS; eth_num++) {
+	for (eth_num = 0; eth_num < CONFIG_SYS_NPE_NUMS; eth_num++) {
 
 		/* See if we can actually bring up the interface, otherwise, skip it */
 		switch (eth_num) {
@@ -673,8 +673,8 @@ int npe_initialize(bd_t * bis)
 
 			npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 			npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-						 CFG_CACHELINE_SIZE - 1)
-						& ~(CFG_CACHELINE_SIZE - 1));
+						 CONFIG_SYS_CACHELINE_SIZE - 1)
+						& ~(CONFIG_SYS_CACHELINE_SIZE - 1));
 
 			if (!npe_csr_load())
 				return 0;