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| author | Wolfgang Denk <wd@denx.de> | 2008-05-20 16:00:29 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-05-21 00:14:08 +0200 |
| commit | 53677ef18e25c97ac613349087c5cb33ae5a2741 (patch) | |
| tree | f947d34d6efaee2401ea0e4c6104ef2f6a0f7ad0 /cpu/ixp/npe/include/IxOsalMemAccess.h | |
| parent | 727f63334676e760877d43bfb8f0e9331ac8b101 (diff) | |
| download | u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.zip u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.tar.gz u-boot-imx-53677ef18e25c97ac613349087c5cb33ae5a2741.tar.bz2 | |
Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/ixp/npe/include/IxOsalMemAccess.h')
| -rw-r--r-- | cpu/ixp/npe/include/IxOsalMemAccess.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/ixp/npe/include/IxOsalMemAccess.h b/cpu/ixp/npe/include/IxOsalMemAccess.h index 2ad0ccf..9e7fb87 100644 --- a/cpu/ixp/npe/include/IxOsalMemAccess.h +++ b/cpu/ixp/npe/include/IxOsalMemAccess.h @@ -410,7 +410,7 @@ ixOsalDataCoherentShortWriteSwap (volatile UINT16 * sAddr, UINT16 sData) #define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_BE(wAddr) #define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_BE(sAddr) #define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_BE(bAddr) -#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_BE(wAddr, wData) +#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_BE(wAddr, wData) #define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_BE(sAddr, sData) #define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_BE(bAddr, bData) @@ -419,7 +419,7 @@ ixOsalDataCoherentShortWriteSwap (volatile UINT16 * sAddr, UINT16 sData) #define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_LE_AC(wAddr) #define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_LE_AC(sAddr) #define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_LE_AC(bAddr) -#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData) +#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_AC(wAddr, wData) #define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_LE_AC(sAddr, sData) #define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_LE_AC(bAddr, bData) @@ -428,7 +428,7 @@ ixOsalDataCoherentShortWriteSwap (volatile UINT16 * sAddr, UINT16 sData) #define IX_OSAL_READ_LONG(wAddr) IX_OSAL_READ_LONG_LE_DC(wAddr) #define IX_OSAL_READ_SHORT(sAddr) IX_OSAL_READ_SHORT_LE_DC(sAddr) #define IX_OSAL_READ_BYTE(bAddr) IX_OSAL_READ_BYTE_LE_DC(bAddr) -#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData) +#define IX_OSAL_WRITE_LONG(wAddr, wData) IX_OSAL_WRITE_LONG_LE_DC(wAddr, wData) #define IX_OSAL_WRITE_SHORT(sAddr, sData) IX_OSAL_WRITE_SHORT_LE_DC(sAddr, sData) #define IX_OSAL_WRITE_BYTE(bAddr, bData) IX_OSAL_WRITE_BYTE_LE_DC(bAddr, bData) |