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authorJon Loeliger <jdl@freescale.com>2006-09-19 08:51:24 -0500
committerJon Loeliger <jdl@freescale.com>2006-09-19 08:51:24 -0500
commitafa98843e4665add11b69496341053b268156e3a (patch)
tree116878b6b94920a5f282d0a16e4b9ad9dfaf57ff /cpu/i386/sc520_asm.S
parentb440d0ef72e6278973d3220c10136a4c0624c286 (diff)
parentaeec782b020930732eab075af97212c3f03afcae (diff)
downloadu-boot-imx-afa98843e4665add11b69496341053b268156e3a.zip
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Merge branch 'master' of http://www.denx.de/git/u-boot
Conflicts: board/stxxtc/Makefile
Diffstat (limited to 'cpu/i386/sc520_asm.S')
-rw-r--r--cpu/i386/sc520_asm.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/cpu/i386/sc520_asm.S b/cpu/i386/sc520_asm.S
index e1fa37a..8fc713d 100644
--- a/cpu/i386/sc520_asm.S
+++ b/cpu/i386/sc520_asm.S
@@ -462,7 +462,7 @@ emptybank:
#if defined CFG_SDRAM_DRCTMCTL
/* just have your hardware desinger _GIVE_ you what you need here! */
- movl $DRCTMCTL, %edi
+ movl $DRCTMCTL, %edi
movb $CFG_SDRAM_DRCTMCTL,%al
movb (%edi), %al
#else
@@ -477,7 +477,7 @@ emptybank:
#ifdef CFG_SDRAM_CAS_LATENCY_3T
orb $0x10, %al
#endif
- movb %al, (%edi)
+ movb %al, (%edi)
#endif
#endif
movl $DRCCTL, %edi /* DRAM Control register */
@@ -537,7 +537,7 @@ bank0: movl (%edi), %eax
movl %eax, %ebx
-done:
+done:
movl %ebx, %eax
#if CFG_SDRAM_ECC_ENABLE
@@ -547,7 +547,7 @@ done:
movl $0x1, %edi
memtest0:
movb $0xa5, (%edi)
- cmpb $0xa5, (%edi)
+ cmpb $0xa5, (%edi)
jne out
shrl $1, %ecx
andl %ecx,%ecx
@@ -571,11 +571,11 @@ set_ecc:
/* enable NMI mapping for ECC */
movl $ECCINT, %edi
mov $0x10, %al
- movb %al, (%edi)
+ movb %al, (%edi)
/* Turn on ECC */
movl $ECCCTL, %edi
mov $0x05, %al
- movb %al, (%edi)
+ movb %al, (%edi)
#endif
out:
movl %ebx, %eax