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authorMike Frysinger <vapier@gentoo.org>2009-10-09 02:24:33 -0400
committerMike Frysinger <vapier@gentoo.org>2009-10-13 21:48:52 -0400
commit1f003cf4738a199d99c818124784058526d2d40e (patch)
tree5c62e673b6a0995d20a0d7c403b8d7f2716712fb /cpu/blackfin
parent370ec734557d0b0f266e6d0953229ee12cae5edd (diff)
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Blackfin: reset watchdog in udelay()
All arches apparently should reset the watchdog in their udelay loop as noted on the mailing list recently: > A comment in flash_status_check() suggests that udelay() is > expected to reset the watchdog, but I can't find any architecture > where it does. If this is missing in other architectures, it should be fixed at the root cause, i. e. in udelay() or in the respective support routines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'cpu/blackfin')
-rw-r--r--cpu/blackfin/interrupts.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/cpu/blackfin/interrupts.c b/cpu/blackfin/interrupts.c
index bf6fb4b..19456e5 100644
--- a/cpu/blackfin/interrupts.c
+++ b/cpu/blackfin/interrupts.c
@@ -20,6 +20,7 @@
#include <common.h>
#include <config.h>
+#include <watchdog.h>
#include <asm/blackfin.h>
#include "cpu.h"
@@ -70,6 +71,8 @@ void udelay(unsigned long usec)
cclk = (CONFIG_CCLK_HZ);
while (usec > 1) {
+ WATCHDOG_RESET();
+
/*
* how many clock ticks to delay?
* - request(in useconds) * clock_ticks(Hz) / useconds/second