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authorWolfgang Denk <wd@denx.de>2008-02-15 00:06:18 +0100
committerWolfgang Denk <wd@denx.de>2008-02-15 00:06:18 +0100
commit6f99eec3dc2285abfb93631003f7e5cadf2eab0f (patch)
tree1eaaa31eb768d8bfa68e9ff41eef53d37b64f21c /cpu/bf537/start.S
parentf6921e3dc331293c873ec4d109fd5517a42a90b3 (diff)
parent30942b18b66f35f2ceedab39af10e9eccaa943cc (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin
Conflicts: Makefile doc/README.standalone Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/bf537/start.S')
-rw-r--r--cpu/bf537/start.S31
1 files changed, 14 insertions, 17 deletions
diff --git a/cpu/bf537/start.S b/cpu/bf537/start.S
index 4e02bcb..a48f3c6 100644
--- a/cpu/bf537/start.S
+++ b/cpu/bf537/start.S
@@ -41,19 +41,16 @@
#include <config.h>
#include <asm/blackfin.h>
+#include <asm/mach-common/bits/core.h>
+#include <asm/mach-common/bits/dma.h>
+#include <asm/mach-common/bits/pll.h>
+
.global _stext;
.global __bss_start;
.global start;
.global _start;
-.global _rambase;
-.global _ramstart;
-.global _ramend;
-.global _bf533_data_dest;
-.global _bf533_data_size;
.global edata;
-.global _initialize;
.global _exit;
-.global flashdataend;
.global init_sdram;
.global _icache_enable;
.global _dcache_enable;
@@ -151,8 +148,8 @@ no_soft_reset:
nop;
/* Clear EVT registers */
- p0.h = (EVT_EMULATION_ADDR >> 16);
- p0.l = (EVT_EMULATION_ADDR & 0xFFFF);
+ p0.h = (EVT0 >> 16);
+ p0.l = (EVT0 & 0xFFFF);
p0 += 8;
p1 = 14;
r1 = 0;
@@ -291,8 +288,8 @@ postcopy:
R1.H = (CFG_FLASH_BASE >> 16);
R1.L = (CFG_FLASH_BASE & 0xFFFF);
R0 = R0 + R1; /* Source Address */
- R1.H = hi(L1_ISRAM); /* Destination Address (high) */
- R1.L = lo(L1_ISRAM); /* Destination Address (low) */
+ R1.H = hi(L1_INST_SRAM); /* Destination Address (high) */
+ R1.L = lo(L1_INST_SRAM); /* Destination Address (low) */
R3.L = DMAEN; /* Source DMAConfig Value (8-bit words) */
/* Destination DMAConfig Value (8-bit words) */
R4.L = (DI_EN | WNR | DMAEN);
@@ -415,8 +412,8 @@ loop1:
*/
/* To keep ourselves in the supervisor mode */
- p0.l = (EVT_IVG15_ADDR & 0xFFFF);
- p0.h = (EVT_IVG15_ADDR >> 16);
+ p0.l = (EVT15 & 0xFFFF);
+ p0.h = (EVT15 >> 16);
p1.l = _real_start;
p1.h = _real_start;
@@ -424,8 +421,8 @@ loop1:
p0.l = (IMASK & 0xFFFF);
p0.h = (IMASK >> 16);
- r0.l = LO(IVG15_POS);
- r0.h = HI(IVG15_POS);
+ r0.l = LO(EVT_IVG15);
+ r0.h = HI(EVT_IVG15);
[p0] = r0;
raise 15;
p0.l = WAIT_HERE;
@@ -495,8 +492,8 @@ copy:
R1.H = reset_end;
R1.L = reset_end;
R2 = R1 - R0; /* Count */
- R1.H = hi(L1_ISRAM); /* Destination Address (high) */
- R1.L = lo(L1_ISRAM); /* Destination Address (low) */
+ R1.H = hi(L1_INST_SRAM); /* Destination Address (high) */
+ R1.L = lo(L1_INST_SRAM); /* Destination Address (low) */
R3.L = DMAEN; /* Source DMAConfig Value (8-bit words) */
R4.L = (DI_EN | WNR | DMAEN); /* Destination DMAConfig Value (8-bit words) */