diff options
| author | wdenk <wdenk> | 2004-02-24 00:16:43 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-02-24 00:16:43 +0000 |
| commit | 074cff0d2863bab21b065cf283eccd728f4fecaa (patch) | |
| tree | 9ab218f6e0fc44cc450d32c1d0978f98449e220d /cpu/at91rm9200 | |
| parent | 028ab6b598b628326116acd88e0f35aa9f526d12 (diff) | |
| download | u-boot-imx-074cff0d2863bab21b065cf283eccd728f4fecaa.zip u-boot-imx-074cff0d2863bab21b065cf283eccd728f4fecaa.tar.gz u-boot-imx-074cff0d2863bab21b065cf283eccd728f4fecaa.tar.bz2 | |
* Patch by Andrea Scian, 17 Feb 2004:
Add support for S3C44B0 processor and DAVE B2 board
* Patch by Steven Scholz, 20 Feb 2004:
- Add support for MII commands on AT91RM9200 boards
- some cleanup in AT91RM9200 ethernet code
Diffstat (limited to 'cpu/at91rm9200')
| -rw-r--r-- | cpu/at91rm9200/at91rm9200_ether.c | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/cpu/at91rm9200/at91rm9200_ether.c b/cpu/at91rm9200/at91rm9200_ether.c index 347a57b..3428a9e 100644 --- a/cpu/at91rm9200/at91rm9200_ether.c +++ b/cpu/at91rm9200/at91rm9200_ether.c @@ -310,8 +310,9 @@ static UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac, unsigned short *pInput) { p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) | - (AT91C_EMAC_CODE_802_3) | (AT91C_EMAC_RW_R) | - (RegisterAddress << 18); + (AT91C_EMAC_RW_R) | + (RegisterAddress << 18) | + (AT91C_EMAC_CODE_802_3); udelay (10000); @@ -421,8 +422,14 @@ int eth_init (bd_t * bd) p_mac->EMAC_RBQP = (long) (&rbfdt[0]); p_mac->EMAC_RSR &= ~(AT91C_EMAC_RSR_OVR | AT91C_EMAC_REC | AT91C_EMAC_BNA); - p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC | AT91C_EMAC_RMII) + + p_mac->EMAC_CFG = (p_mac->EMAC_CFG | AT91C_EMAC_CAF | AT91C_EMAC_NBC) & ~AT91C_EMAC_CLK; + +#ifdef CONFIG_AT91C_USE_RMII + p_mac->EMAC_CFG |= AT91C_EMAC_RMII; +#endif + p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE; return 0; @@ -462,5 +469,25 @@ int eth_rx (void) void eth_halt (void) { }; + +#if (CONFIG_COMMANDS & CFG_CMD_MII) +int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value) +{ + at91rm9200_EmacEnableMDIO (p_mac); + at91rm9200_EmacReadPhy (p_mac, reg, value); + at91rm9200_EmacDisableMDIO (p_mac); + return 0; +} + +int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value) +{ + at91rm9200_EmacEnableMDIO (p_mac); + at91rm9200_EmacWritePhy (p_mac, reg, &value); + at91rm9200_EmacDisableMDIO (p_mac); + return 0; +} +#endif /* CONFIG_COMMANDS & CFG_CMD_MII */ + #endif /* CONFIG_COMMANDS & CFG_CMD_NET */ + #endif /* CONFIG_DRIVER_ETHER */ |