diff options
author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /cpu/at32ap | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/at32ap')
-rw-r--r-- | cpu/at32ap/at32ap700x/clk.c | 24 | ||||
-rw-r--r-- | cpu/at32ap/at32ap700x/gpio.c | 4 | ||||
-rw-r--r-- | cpu/at32ap/cache.c | 8 | ||||
-rw-r--r-- | cpu/at32ap/cpu.c | 10 | ||||
-rw-r--r-- | cpu/at32ap/hsdramc.c | 4 | ||||
-rw-r--r-- | cpu/at32ap/interrupts.c | 4 | ||||
-rw-r--r-- | cpu/at32ap/start.S | 2 |
7 files changed, 28 insertions, 28 deletions
diff --git a/cpu/at32ap/at32ap700x/clk.c b/cpu/at32ap/at32ap700x/clk.c index b3aa034..2b1cd36 100644 --- a/cpu/at32ap/at32ap700x/clk.c +++ b/cpu/at32ap/at32ap700x/clk.c @@ -38,10 +38,10 @@ void clk_init(void) #ifdef CONFIG_PLL /* Initialize the PLL */ - sm_writel(PM_PLL0, (SM_BF(PLLCOUNT, CFG_PLL0_SUPPRESS_CYCLES) - | SM_BF(PLLMUL, CFG_PLL0_MUL - 1) - | SM_BF(PLLDIV, CFG_PLL0_DIV - 1) - | SM_BF(PLLOPT, CFG_PLL0_OPT) + sm_writel(PM_PLL0, (SM_BF(PLLCOUNT, CONFIG_SYS_PLL0_SUPPRESS_CYCLES) + | SM_BF(PLLMUL, CONFIG_SYS_PLL0_MUL - 1) + | SM_BF(PLLDIV, CONFIG_SYS_PLL0_DIV - 1) + | SM_BF(PLLOPT, CONFIG_SYS_PLL0_OPT) | SM_BF(PLLOSC, 0) | SM_BIT(PLLEN))); @@ -51,14 +51,14 @@ void clk_init(void) /* Set up clocks for the CPU and all peripheral buses */ cksel = 0; - if (CFG_CLKDIV_CPU) - cksel |= SM_BIT(CPUDIV) | SM_BF(CPUSEL, CFG_CLKDIV_CPU - 1); - if (CFG_CLKDIV_HSB) - cksel |= SM_BIT(HSBDIV) | SM_BF(HSBSEL, CFG_CLKDIV_HSB - 1); - if (CFG_CLKDIV_PBA) - cksel |= SM_BIT(PBADIV) | SM_BF(PBASEL, CFG_CLKDIV_PBA - 1); - if (CFG_CLKDIV_PBB) - cksel |= SM_BIT(PBBDIV) | SM_BF(PBBSEL, CFG_CLKDIV_PBB - 1); + if (CONFIG_SYS_CLKDIV_CPU) + cksel |= SM_BIT(CPUDIV) | SM_BF(CPUSEL, CONFIG_SYS_CLKDIV_CPU - 1); + if (CONFIG_SYS_CLKDIV_HSB) + cksel |= SM_BIT(HSBDIV) | SM_BF(HSBSEL, CONFIG_SYS_CLKDIV_HSB - 1); + if (CONFIG_SYS_CLKDIV_PBA) + cksel |= SM_BIT(PBADIV) | SM_BF(PBASEL, CONFIG_SYS_CLKDIV_PBA - 1); + if (CONFIG_SYS_CLKDIV_PBB) + cksel |= SM_BIT(PBBDIV) | SM_BF(PBBSEL, CONFIG_SYS_CLKDIV_PBB - 1); sm_writel(PM_CKSEL, cksel); #ifdef CONFIG_PLL diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 56ba2f9..91bb636 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -33,8 +33,8 @@ */ void gpio_enable_ebi(void) { -#ifdef CFG_HSDRAMC -#ifndef CFG_SDRAM_16BIT +#ifdef CONFIG_SYS_HSDRAMC +#ifndef CONFIG_SYS_SDRAM_16BIT gpio_select_periph_A(GPIO_PIN_PE0, 0); gpio_select_periph_A(GPIO_PIN_PE1, 0); gpio_select_periph_A(GPIO_PIN_PE2, 0); diff --git a/cpu/at32ap/cache.c b/cpu/at32ap/cache.c index 41fb5aa..16a0565 100644 --- a/cpu/at32ap/cache.c +++ b/cpu/at32ap/cache.c @@ -28,7 +28,7 @@ void dcache_clean_range(volatile void *start, size_t size) { unsigned long v, begin, end, linesz; - linesz = CFG_DCACHE_LINESZ; + linesz = CONFIG_SYS_DCACHE_LINESZ; /* You asked for it, you got it */ begin = (unsigned long)start & ~(linesz - 1); @@ -44,7 +44,7 @@ void dcache_invalidate_range(volatile void *start, size_t size) { unsigned long v, begin, end, linesz; - linesz = CFG_DCACHE_LINESZ; + linesz = CONFIG_SYS_DCACHE_LINESZ; /* You asked for it, you got it */ begin = (unsigned long)start & ~(linesz - 1); @@ -58,7 +58,7 @@ void dcache_flush_range(volatile void *start, size_t size) { unsigned long v, begin, end, linesz; - linesz = CFG_DCACHE_LINESZ; + linesz = CONFIG_SYS_DCACHE_LINESZ; /* You asked for it, you got it */ begin = (unsigned long)start & ~(linesz - 1); @@ -74,7 +74,7 @@ void icache_invalidate_range(volatile void *start, size_t size) { unsigned long v, begin, end, linesz; - linesz = CFG_ICACHE_LINESZ; + linesz = CONFIG_SYS_ICACHE_LINESZ; /* You asked for it, you got it */ begin = (unsigned long)start & ~(linesz - 1); diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c index 1a13702..f92d3e2 100644 --- a/cpu/at32ap/cpu.c +++ b/cpu/at32ap/cpu.c @@ -32,12 +32,12 @@ #include "hsmc3.h" /* Sanity checks */ -#if (CFG_CLKDIV_CPU > CFG_CLKDIV_HSB) \ - || (CFG_CLKDIV_HSB > CFG_CLKDIV_PBA) \ - || (CFG_CLKDIV_HSB > CFG_CLKDIV_PBB) +#if (CONFIG_SYS_CLKDIV_CPU > CONFIG_SYS_CLKDIV_HSB) \ + || (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBA) \ + || (CONFIG_SYS_CLKDIV_HSB > CONFIG_SYS_CLKDIV_PBB) # error Constraint fCPU >= fHSB >= fPB{A,B} violated #endif -#if defined(CONFIG_PLL) && ((CFG_PLL0_MUL < 1) || (CFG_PLL0_DIV < 1)) +#if defined(CONFIG_PLL) && ((CONFIG_SYS_PLL0_MUL < 1) || (CONFIG_SYS_PLL0_DIV < 1)) # error Invalid PLL multiplier and/or divider #endif @@ -47,7 +47,7 @@ int cpu_init(void) { extern void _evba(void); - gd->cpu_hz = CFG_OSC0_HZ; + gd->cpu_hz = CONFIG_SYS_OSC0_HZ; /* TODO: Move somewhere else, but needs to be run before we * increase the clock frequency. */ diff --git a/cpu/at32ap/hsdramc.c b/cpu/at32ap/hsdramc.c index 992612b..f74121c 100644 --- a/cpu/at32ap/hsdramc.c +++ b/cpu/at32ap/hsdramc.c @@ -21,7 +21,7 @@ */ #include <common.h> -#ifdef CFG_HSDRAMC +#ifdef CONFIG_SYS_HSDRAMC #include <asm/io.h> #include <asm/sdram.h> @@ -117,4 +117,4 @@ unsigned long sdram_init(void *sdram_base, const struct sdram_config *config) return sdram_size; } -#endif /* CFG_HSDRAMC */ +#endif /* CONFIG_SYS_HSDRAMC */ diff --git a/cpu/at32ap/interrupts.c b/cpu/at32ap/interrupts.c index 160838e..75cc39e 100644 --- a/cpu/at32ap/interrupts.c +++ b/cpu/at32ap/interrupts.c @@ -82,7 +82,7 @@ void set_timer(unsigned long t) unsigned long long ticks = t; unsigned long lo, hi, hi_new; - ticks = (ticks * get_tbclk()) / CFG_HZ; + ticks = (ticks * get_tbclk()) / CONFIG_SYS_HZ; hi = ticks >> 32; lo = ticks & 0xffffffffUL; @@ -137,7 +137,7 @@ void timer_init(void) sysreg_write(COUNT, 0); - tmp = (u64)CFG_HZ << 32; + tmp = (u64)CONFIG_SYS_HZ << 32; tmp += gd->cpu_hz / 2; do_div(tmp, gd->cpu_hz); tb_factor = (u32)tmp; diff --git a/cpu/at32ap/start.S b/cpu/at32ap/start.S index 907e9b1..d37a46e 100644 --- a/cpu/at32ap/start.S +++ b/cpu/at32ap/start.S @@ -188,7 +188,7 @@ at32ap_low_level_init: .align 2 .type sp_init,@object sp_init: - .long CFG_INIT_SP_ADDR + .long CONFIG_SYS_INIT_SP_ADDR got_init: .long 3b - _GLOBAL_OFFSET_TABLE_ |