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author | Wolfgang Denk <wd@denx.de> | 2008-06-05 01:12:30 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-06-05 01:12:30 +0200 |
commit | 8155efbd7ae9c65564ca98affe94631d612ae088 (patch) | |
tree | 23f89ba651f48bf88c653796cb64f2c58d2f0515 /cpu/at32ap/cpu.c | |
parent | 5e1882df6a3efc7de5524d28cea4ecde7d163d54 (diff) | |
parent | 9ef1cbef1a649e3779298b0e663be4865cbbbfbc (diff) | |
download | u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.zip u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.tar.gz u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.tar.bz2 |
Merge branch 'master' of ssh://mercury/home/wd/git/u-boot/master
Diffstat (limited to 'cpu/at32ap/cpu.c')
-rw-r--r-- | cpu/at32ap/cpu.c | 50 |
1 files changed, 5 insertions, 45 deletions
diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c index 311466b..0ba8361 100644 --- a/cpu/at32ap/cpu.c +++ b/cpu/at32ap/cpu.c @@ -30,7 +30,6 @@ #include <asm/arch/memory-map.h> #include "hsmc3.h" -#include "sm.h" /* Sanity checks */ #if (CFG_CLKDIV_CPU > CFG_CLKDIV_HSB) \ @@ -44,47 +43,9 @@ DECLARE_GLOBAL_DATA_PTR; -static void pm_init(void) -{ - uint32_t cksel; - -#ifdef CONFIG_PLL - /* Initialize the PLL */ - sm_writel(PM_PLL0, (SM_BF(PLLCOUNT, CFG_PLL0_SUPPRESS_CYCLES) - | SM_BF(PLLMUL, CFG_PLL0_MUL - 1) - | SM_BF(PLLDIV, CFG_PLL0_DIV - 1) - | SM_BF(PLLOPT, CFG_PLL0_OPT) - | SM_BF(PLLOSC, 0) - | SM_BIT(PLLEN))); - - /* Wait for lock */ - while (!(sm_readl(PM_ISR) & SM_BIT(LOCK0))) ; -#endif - - /* Set up clocks for the CPU and all peripheral buses */ - cksel = 0; - if (CFG_CLKDIV_CPU) - cksel |= SM_BIT(CPUDIV) | SM_BF(CPUSEL, CFG_CLKDIV_CPU - 1); - if (CFG_CLKDIV_HSB) - cksel |= SM_BIT(HSBDIV) | SM_BF(HSBSEL, CFG_CLKDIV_HSB - 1); - if (CFG_CLKDIV_PBA) - cksel |= SM_BIT(PBADIV) | SM_BF(PBASEL, CFG_CLKDIV_PBA - 1); - if (CFG_CLKDIV_PBB) - cksel |= SM_BIT(PBBDIV) | SM_BF(PBBSEL, CFG_CLKDIV_PBB - 1); - sm_writel(PM_CKSEL, cksel); - - gd->cpu_hz = get_cpu_clk_rate(); - -#ifdef CONFIG_PLL - /* Use PLL0 as main clock */ - sm_writel(PM_MCCTRL, SM_BIT(PLLSEL)); -#endif -} - int cpu_init(void) { extern void _evba(void); - char *p; gd->cpu_hz = CFG_OSC0_HZ; @@ -95,16 +56,15 @@ int cpu_init(void) hsmc3_writel(PULSE0, 0x0b0a0906); hsmc3_writel(SETUP0, 0x00010002); - pm_init(); + clk_init(); + /* Update the CPU speed according to the PLL configuration */ + gd->cpu_hz = get_cpu_clk_rate(); + + /* Set up the exception handler table and enable exceptions */ sysreg_write(EVBA, (unsigned long)&_evba); asm volatile("csrf %0" : : "i"(SYSREG_EM_OFFSET)); - /* Lock everything that mess with the flash in the icache */ - for (p = __flashprog_start; p <= (__flashprog_end + CFG_ICACHE_LINESZ); - p += CFG_ICACHE_LINESZ) - asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory"); - return 0; } |