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| author | Wolfgang Denk <wd@denx.de> | 2008-06-05 01:12:30 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-06-05 01:12:30 +0200 |
| commit | 8155efbd7ae9c65564ca98affe94631d612ae088 (patch) | |
| tree | 23f89ba651f48bf88c653796cb64f2c58d2f0515 /cpu/at32ap/at32ap700x/gpio.c | |
| parent | 5e1882df6a3efc7de5524d28cea4ecde7d163d54 (diff) | |
| parent | 9ef1cbef1a649e3779298b0e663be4865cbbbfbc (diff) | |
| download | u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.zip u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.tar.gz u-boot-imx-8155efbd7ae9c65564ca98affe94631d612ae088.tar.bz2 | |
Merge branch 'master' of ssh://mercury/home/wd/git/u-boot/master
Diffstat (limited to 'cpu/at32ap/at32ap700x/gpio.c')
| -rw-r--r-- | cpu/at32ap/at32ap700x/gpio.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 859124a..3da35d4 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -21,8 +21,11 @@ */ #include <common.h> +#include <asm/io.h> + #include <asm/arch/chip-features.h> #include <asm/arch/gpio.h> +#include <asm/arch/memory-map.h> /* * Lots of small functions here. We depend on --gc-sections getting @@ -142,3 +145,43 @@ void gpio_enable_mmci(void) gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif + +#ifdef AT32AP700x_CHIP_HAS_SPI +void gpio_enable_spi0(unsigned long cs_mask) +{ + u32 pa_mask = 0; + + gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */ + gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */ + gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */ + + if (cs_mask & (1 << 0)) + pa_mask |= 1 << 3; /* NPCS0 */ + if (cs_mask & (1 << 1)) + pa_mask |= 1 << 4; /* NPCS1 */ + if (cs_mask & (1 << 2)) + pa_mask |= 1 << 5; /* NPCS2 */ + if (cs_mask & (1 << 3)) + pa_mask |= 1 << 20; /* NPCS3 */ + + __raw_writel(pa_mask, PIOA_BASE + 0x00); + __raw_writel(pa_mask, PIOA_BASE + 0x30); + __raw_writel(pa_mask, PIOA_BASE + 0x10); +} + +void gpio_enable_spi1(unsigned long cs_mask) +{ + gpio_select_periph_B(GPIO_PIN_PA0, 0); /* MISO */ + gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */ + gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */ + + if (cs_mask & (1 << 0)) + gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */ + if (cs_mask & (1 << 1)) + gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */ + if (cs_mask & (1 << 2)) + gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */ + if (cs_mask & (1 << 3)) + gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */ +} +#endif |