diff options
| author | Stefan Roese <sr@denx.de> | 2008-07-07 09:51:25 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-07-07 09:51:25 +0200 |
| commit | 7c6237b3e2f2ee0098897da39b79aff4642b8946 (patch) | |
| tree | d768b7851bb688f543da0a3ed50c927a2bde2804 /cpu/at32ap/at32ap700x/gpio.c | |
| parent | dd1c5523d6f44e842e69f2fcb50788c6060eab86 (diff) | |
| parent | c956717ab25c962ef49d49064dfc73f4edcba1fb (diff) | |
| download | u-boot-imx-7c6237b3e2f2ee0098897da39b79aff4642b8946.zip u-boot-imx-7c6237b3e2f2ee0098897da39b79aff4642b8946.tar.gz u-boot-imx-7c6237b3e2f2ee0098897da39b79aff4642b8946.tar.bz2 | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'cpu/at32ap/at32ap700x/gpio.c')
| -rw-r--r-- | cpu/at32ap/at32ap700x/gpio.c | 56 |
1 files changed, 34 insertions, 22 deletions
diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 3da35d4..56ba2f9 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -149,24 +149,27 @@ void gpio_enable_mmci(void) #ifdef AT32AP700x_CHIP_HAS_SPI void gpio_enable_spi0(unsigned long cs_mask) { - u32 pa_mask = 0; - gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */ gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */ gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */ - if (cs_mask & (1 << 0)) - pa_mask |= 1 << 3; /* NPCS0 */ - if (cs_mask & (1 << 1)) - pa_mask |= 1 << 4; /* NPCS1 */ - if (cs_mask & (1 << 2)) - pa_mask |= 1 << 5; /* NPCS2 */ - if (cs_mask & (1 << 3)) - pa_mask |= 1 << 20; /* NPCS3 */ - - __raw_writel(pa_mask, PIOA_BASE + 0x00); - __raw_writel(pa_mask, PIOA_BASE + 0x30); - __raw_writel(pa_mask, PIOA_BASE + 0x10); + /* Set up NPCSx as GPIO outputs, initially high */ + if (cs_mask & (1 << 0)) { + gpio_set_value(GPIO_PIN_PA3, 1); + gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 1)) { + gpio_set_value(GPIO_PIN_PA4, 1); + gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 2)) { + gpio_set_value(GPIO_PIN_PA5, 1); + gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 3)) { + gpio_set_value(GPIO_PIN_PA20, 1); + gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT); + } } void gpio_enable_spi1(unsigned long cs_mask) @@ -175,13 +178,22 @@ void gpio_enable_spi1(unsigned long cs_mask) gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */ gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */ - if (cs_mask & (1 << 0)) - gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */ - if (cs_mask & (1 << 1)) - gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */ - if (cs_mask & (1 << 2)) - gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */ - if (cs_mask & (1 << 3)) - gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */ + /* Set up NPCSx as GPIO outputs, initially high */ + if (cs_mask & (1 << 0)) { + gpio_set_value(GPIO_PIN_PB2, 1); + gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 1)) { + gpio_set_value(GPIO_PIN_PB3, 1); + gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 2)) { + gpio_set_value(GPIO_PIN_PB4, 1); + gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 3)) { + gpio_set_value(GPIO_PIN_PA27, 1); + gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT); + } } #endif |