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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-04-05 13:06:31 +0200
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-04-05 13:06:31 +0200
commitb3acb6cd4059dfb29a5e99095d802717f53ff784 (patch)
tree0578103fde893d08e5b6127db4df18833ae3d075 /cpu/arm_cortexa8
parent677e62f43235de9a1701204d7bcea0fb3d233fa1 (diff)
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arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/arm_cortexa8')
-rw-r--r--cpu/arm_cortexa8/cpu.c39
1 files changed, 0 insertions, 39 deletions
diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c
index 506dbec..64ee972 100644
--- a/cpu/arm_cortexa8/cpu.c
+++ b/cpu/arm_cortexa8/cpu.c
@@ -46,13 +46,6 @@ void l2cache_disable(void);
static void cache_flush(void);
-static void cp_delay(void)
-{
- /* Many OMAP regs need at least 2 nops */
- asm("nop");
- asm("nop");
-}
-
int cpu_init(void)
{
/*
@@ -111,33 +104,6 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return 0;
}
-void icache_enable(void)
-{
- ulong reg;
-
- reg = get_cr(); /* get control reg. */
- cp_delay();
- set_cr(reg | CR_I);
-}
-
-void icache_disable(void)
-{
- ulong reg;
-
- reg = get_cr();
- cp_delay();
- set_cr(reg & ~CR_I);
-}
-
-void dcache_disable (void)
-{
- ulong reg;
-
- reg = get_cr ();
- cp_delay ();
- set_cr (reg & ~CR_C);
-}
-
void l2cache_enable()
{
unsigned long i;
@@ -197,11 +163,6 @@ void l2cache_disable()
}
}
-int icache_status(void)
-{
- return (get_cr() & CR_I) != 0;
-}
-
static void cache_flush(void)
{
asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));