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author | Stefano Babic <sbabic@denx.de> | 2010-03-05 17:54:37 +0100 |
---|---|---|
committer | Tom Rix <Tom.Rix@windriver.com> | 2010-03-07 12:36:36 -0600 |
commit | e4d34492017c95e4041ea0c581e1ab8d1d49381b (patch) | |
tree | 3badc8c1ab6433507c7c9d6993ad7aaacb47bf4f /cpu/arm_cortexa8/mx51/lowlevel_init.S | |
parent | 9d69e33d8d0f112fe3a089101d023e87431684d1 (diff) | |
download | u-boot-imx-e4d34492017c95e4041ea0c581e1ab8d1d49381b.zip u-boot-imx-e4d34492017c95e4041ea0c581e1ab8d1d49381b.tar.gz u-boot-imx-e4d34492017c95e4041ea0c581e1ab8d1d49381b.tar.bz2 |
MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'cpu/arm_cortexa8/mx51/lowlevel_init.S')
-rw-r--r-- | cpu/arm_cortexa8/mx51/lowlevel_init.S | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S index 680a90e..700506e 100644 --- a/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -276,7 +276,6 @@ lowlevel_init: init_clock - /* return from mxc_nand_load */ /* r12 saved upper lr*/ mov pc,lr |