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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-05 13:06:31 +0200 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-05 13:06:31 +0200 |
commit | b3acb6cd4059dfb29a5e99095d802717f53ff784 (patch) | |
tree | 0578103fde893d08e5b6127db4df18833ae3d075 /cpu/arm946es | |
parent | 677e62f43235de9a1701204d7bcea0fb3d233fa1 (diff) | |
download | u-boot-imx-b3acb6cd4059dfb29a5e99095d802717f53ff784.zip u-boot-imx-b3acb6cd4059dfb29a5e99095d802717f53ff784.tar.gz u-boot-imx-b3acb6cd4059dfb29a5e99095d802717f53ff784.tar.bz2 |
arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/arm946es')
-rw-r--r-- | cpu/arm946es/cpu.c | 48 |
1 files changed, 11 insertions, 37 deletions
diff --git a/cpu/arm946es/cpu.c b/cpu/arm946es/cpu.c index 25684f2..8d0c533 100644 --- a/cpu/arm946es/cpu.c +++ b/cpu/arm946es/cpu.c @@ -38,13 +38,7 @@ DECLARE_GLOBAL_DATA_PTR; #endif -static void cp_delay (void) -{ - volatile int i; - - /* copro seems to need some delay between reading and writing */ - for (i = 0; i < 100; i++); -} +static void cache_flush(void); int cpu_init (void) { @@ -67,8 +61,6 @@ int cleanup_before_linux (void) * we turn off caches etc ... */ - unsigned long i; - disable_interrupts (); /* ARM926E-S needs the protection unit enabled for the icache to have @@ -76,15 +68,12 @@ int cleanup_before_linux (void) * should turn off the protection unit as well.... */ /* turn off I/D-cache */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - i &= ~(CR_C | CR_I); - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); - + icache_disable(); + dcache_disable(); /* flush I/D-cache */ - i = 0; - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); - asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i)); - return (0); + cache_flush(); + + return 0; } int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -96,27 +85,12 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /*NOTREACHED*/ return (0); } -/* ARM926E-S needs the protection unit enabled for this to have any effect - - left for possible later use */ -void icache_enable (void) -{ - ulong reg; - reg = get_cr (); /* get control reg. */ - cp_delay (); - set_cr (reg | CR_I); -} - -void icache_disable (void) +/* flush I/D-cache */ +static void cache_flush (void) { - ulong reg; + unsigned long i = 0; - reg = get_cr (); - cp_delay (); - set_cr (reg & ~CR_I); -} - -int icache_status (void) -{ - return (get_cr () & CR_I) != 0; + asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); + asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i)); } |