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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/arm926ejs/versatile/timer.c | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/arm926ejs/versatile/timer.c')
-rwxr-xr-x | cpu/arm926ejs/versatile/timer.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c index f01f318..9ac867e 100755 --- a/cpu/arm926ejs/versatile/timer.c +++ b/cpu/arm926ejs/versatile/timer.c @@ -41,7 +41,7 @@ #define TIMER_LOAD_VAL 0xffffffff /* macro to read the 32 bit timer */ -#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4)) +#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) static ulong timestamp; static ulong lastdec; @@ -62,9 +62,9 @@ int timer_init (void) ulong tmr_ctrl_val; /* 1st disable the Timer */ - tmr_ctrl_val = *(volatile ulong *)(CFG_TIMERBASE + 8); + tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); tmr_ctrl_val &= ~TIMER_ENABLE; - *(volatile ulong *)(CFG_TIMERBASE + 8) = tmr_ctrl_val; + *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; /* * The Timer Control Register has one Undefined/Shouldn't Use Bit @@ -78,11 +78,11 @@ int timer_init (void) * Tmr Siz : 16 Bit Counter * Tmr in Wrapping Mode */ - tmr_ctrl_val = *(volatile ulong *)(CFG_TIMERBASE + 8); + tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT ); tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); - *(volatile ulong *)(CFG_TIMERBASE + 8) = tmr_ctrl_val; + *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; /* init the timestamp and lastdec value */ reset_timer_masked(); @@ -116,10 +116,10 @@ void udelay (unsigned long usec) if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ tmo /= 1000; /* finish normalize. */ }else{ /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CFG_HZ; + tmo = usec * CONFIG_SYS_HZ; tmo /= (1000*1000); } @@ -169,10 +169,10 @@ void udelay_masked (unsigned long usec) if (usec >= 1000) { /* if "big" number, spread normalization to seconds */ tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ - tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */ tmo /= 1000; /* finish normalize. */ } else { /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CFG_HZ; + tmo = usec * CONFIG_SYS_HZ; tmo /= (1000*1000); } @@ -201,6 +201,6 @@ ulong get_tbclk (void) { ulong tbclk; - tbclk = CFG_HZ; + tbclk = CONFIG_SYS_HZ; return tbclk; } |