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| author | Wolfgang Denk <wd@denx.de> | 2008-09-01 00:06:05 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-09-01 00:06:05 +0200 |
| commit | a13b2d937941f6b525abfcfad96c034f94421188 (patch) | |
| tree | 56e5bdaf62397b2f8cc2be9b17a035d9b059bf8a /cpu/arm926ejs/davinci/dp83848.c | |
| parent | e155c9e00b5f21a6de28479259c440ba71289d00 (diff) | |
| parent | d6e04258be8f2408845468d3cf722a4cf0433445 (diff) | |
| download | u-boot-imx-a13b2d937941f6b525abfcfad96c034f94421188.zip u-boot-imx-a13b2d937941f6b525abfcfad96c034f94421188.tar.gz u-boot-imx-a13b2d937941f6b525abfcfad96c034f94421188.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'cpu/arm926ejs/davinci/dp83848.c')
| -rw-r--r-- | cpu/arm926ejs/davinci/dp83848.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/cpu/arm926ejs/davinci/dp83848.c b/cpu/arm926ejs/davinci/dp83848.c index 2aa9ef1..59f039b 100644 --- a/cpu/arm926ejs/davinci/dp83848.c +++ b/cpu/arm926ejs/davinci/dp83848.c @@ -38,9 +38,9 @@ int dp83848_is_phy_connected(int phy_addr) { u_int16_t id1, id2; - if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID1_REG, &id1)) + if (!davinci_eth_phy_read(phy_addr, DP83848_PHYID1_REG, &id1)) return(0); - if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID2_REG, &id2)) + if (!davinci_eth_phy_read(phy_addr, DP83848_PHYID2_REG, &id2)) return(0); if ((id1 == DP83848_PHYID1_OUI) && (id2 == DP83848_PHYID2_OUI)) @@ -54,13 +54,13 @@ int dp83848_get_link_speed(int phy_addr) u_int16_t tmp; volatile emac_regs* emac = (emac_regs *)EMAC_BASE_ADDR; - if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp)) + if (!davinci_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp)) return(0); if (!(tmp & DP83848_LINK_STATUS)) /* link up? */ return(0); - if (!dm644x_eth_phy_read(phy_addr, DP83848_PHY_STAT_REG, &tmp)) + if (!davinci_eth_phy_read(phy_addr, DP83848_PHY_STAT_REG, &tmp)) return(0); /* Speed doesn't matter, there is no setting for it in EMAC... */ @@ -101,7 +101,7 @@ int dp83848_init_phy(int phy_addr) } /* Disable PHY Interrupts */ - dm644x_eth_phy_write(phy_addr, DP83848_PHY_INTR_CTRL_REG, 0); + davinci_eth_phy_write(phy_addr, DP83848_PHY_INTR_CTRL_REG, 0); return(ret); } @@ -112,13 +112,13 @@ int dp83848_auto_negotiate(int phy_addr) u_int16_t tmp; - if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) + if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) return(0); /* Restart Auto_negotiation */ tmp &= ~DP83848_AUTONEG; /* remove autonegotiation enable */ tmp |= DP83848_ISOLATE; /* Electrically isolate PHY */ - dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); + davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); /* Set the Auto_negotiation Advertisement Register * MII advertising for Next page, 100BaseTxFD and HD, @@ -126,23 +126,23 @@ int dp83848_auto_negotiate(int phy_addr) */ tmp = DP83848_NP | DP83848_TX_FDX | DP83848_TX_HDX | DP83848_10_FDX | DP83848_10_HDX | DP83848_AN_IEEE_802_3; - dm644x_eth_phy_write(phy_addr, DP83848_ANA_REG, tmp); + davinci_eth_phy_write(phy_addr, DP83848_ANA_REG, tmp); /* Read Control Register */ - if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) + if (!davinci_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp)) return(0); tmp |= DP83848_SPEED_SELECT | DP83848_AUTONEG | DP83848_DUPLEX_MODE; - dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); + davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); /* Restart Auto_negotiation */ tmp |= DP83848_RESTART_AUTONEG; - dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); + davinci_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp); /*check AutoNegotiate complete */ udelay(10000); - if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp)) + if (!davinci_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp)) return(0); if (!(tmp & DP83848_AUTONEG_COMP)) |