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author | Wolfgang Denk <wd@pollux.(none)> | 2005-09-25 01:48:28 +0200 |
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committer | Wolfgang Denk <wd@pollux.(none)> | 2005-09-25 01:48:28 +0200 |
commit | 74f4304ee717d0f4b3a27e7fd4a64944749b8783 (patch) | |
tree | 806aadd6a2be863b9a0e4e9649858468b4641c96 /cpu/arm926ejs/cpu.c | |
parent | e2146b6aea0de16e55530cc5ff58fb626d9870cd (diff) | |
download | u-boot-imx-74f4304ee717d0f4b3a27e7fd4a64944749b8783.zip u-boot-imx-74f4304ee717d0f4b3a27e7fd4a64944749b8783.tar.gz u-boot-imx-74f4304ee717d0f4b3a27e7fd4a64944749b8783.tar.bz2 |
Add ARM946E cpu and core module targets; remap memory to 0x00000000
Patch by Peter Pearse, 2 Feb 2005
Diffstat (limited to 'cpu/arm926ejs/cpu.c')
-rw-r--r-- | cpu/arm926ejs/cpu.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c index 2681f99..f57c5a5 100644 --- a/cpu/arm926ejs/cpu.c +++ b/cpu/arm926ejs/cpu.c @@ -69,21 +69,21 @@ static void cp_delay (void) { volatile int i; - /* Many OMAP regs need at least 2 nops */ + /* copro seems to need some delay between reading and writing */ for (i = 0; i < 100; i++); } -/* See also ARM Ref. Man. */ +/* See also ARM926EJ-S Technical Reference Manual */ #define C1_MMU (1<<0) /* mmu off/on */ #define C1_ALIGN (1<<1) /* alignment faults off/on */ #define C1_DC (1<<2) /* dcache off/on */ -#define C1_WB (1<<3) /* merging write buffer on/off */ -#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */ + +#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */ #define C1_SYS_PROT (1<<8) /* system protection */ #define C1_ROM_PROT (1<<9) /* ROM protection */ #define C1_IC (1<<12) /* icache off/on */ -#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */ -#define RESERVED_1 (0xf << 3) /* must be 111b for R/W */ +#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */ + int cpu_init (void) { @@ -120,6 +120,7 @@ int cleanup_before_linux (void) /* flush I/D-cache */ i = 0; asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); + return (0); } |