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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-03-27 13:14:52 +0100
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-04-04 20:42:17 +0200
commita47492ac60657dd9d59c713aa049319ea6eabd52 (patch)
tree0d8b6e5fcafa73af272067d15a08e06a95a8f6b9 /cpu/arm926ejs/at91/at91sam9261_spi.c
parent42f9ebff2f758bef524780a00c712eb63a72d99b (diff)
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u-boot-imx-a47492ac60657dd9d59c713aa049319ea6eabd52.tar.gz
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at91sam9/at91cap: spi init add hardware chip select support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/arm926ejs/at91/at91sam9261_spi.c')
-rw-r--r--cpu/arm926ejs/at91/at91sam9261_spi.c36
1 files changed, 30 insertions, 6 deletions
diff --git a/cpu/arm926ejs/at91/at91sam9261_spi.c b/cpu/arm926ejs/at91/at91sam9261_spi.c
index f70320d..9383dc6 100644
--- a/cpu/arm926ejs/at91/at91sam9261_spi.c
+++ b/cpu/arm926ejs/at91/at91sam9261_spi.c
@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_A_periph(AT91_PIN_PA3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA4, 1);
+ at91_set_A_periph(AT91_PIN_PA4, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PA5, 1);
+ at91_set_A_periph(AT91_PIN_PA5, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PA6, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PA3, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA4, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PA5, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA6, 1);
}
}
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_gpio_output(AT91_PIN_PB28, 1);
+ at91_set_A_periph(AT91_PIN_PB28, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_gpio_output(AT91_PIN_PA24, 1);
+ at91_set_B_periph(AT91_PIN_PA24, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_gpio_output(AT91_PIN_PA25, 1);
+ at91_set_B_periph(AT91_PIN_PA25, 1);
}
if (cs_mask & (1 << 3)) {
+ at91_set_A_periph(AT91_PIN_PA26, 1);
+ }
+ if (cs_mask & (1 << 4)) {
+ at91_set_gpio_output(AT91_PIN_PB28, 1);
+ }
+ if (cs_mask & (1 << 5)) {
+ at91_set_gpio_output(AT91_PIN_PA24, 1);
+ }
+ if (cs_mask & (1 << 6)) {
+ at91_set_gpio_output(AT91_PIN_PA25, 1);
+ }
+ if (cs_mask & (1 << 7)) {
at91_set_gpio_output(AT91_PIN_PA26, 1);
}
}