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authorJens Scharsig <js_at_ng@scharsoft.de>2010-02-03 22:46:46 +0100
committerTom Rix <Tom.Rix@windriver.com>2010-02-12 12:31:54 -0600
commit7f9e8633ac9c846e7e4f867507cbd5de1bd99e0c (patch)
tree677e3131d7305d68882ff00c4e7177bff9a03d31 /cpu/arm926ejs/at91/at91sam9261_devices.c
parentea8fbba73184a40437bdeccd888cf448d5f1105e (diff)
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convert all at91 files to use at91_gpio driver syntax
* convert all files cpu/../at91 to use at91_gpio driver syntax * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2 this makes all 160 AT91_PINPxxx defines obsolete * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Diffstat (limited to 'cpu/arm926ejs/at91/at91sam9261_devices.c')
-rw-r--r--cpu/arm926ejs/at91/at91sam9261_devices.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/cpu/arm926ejs/at91/at91sam9261_devices.c b/cpu/arm926ejs/at91/at91sam9261_devices.c
index 16d411f..286e72a 100644
--- a/cpu/arm926ejs/at91/at91sam9261_devices.c
+++ b/cpu/arm926ejs/at91/at91sam9261_devices.c
@@ -30,29 +30,29 @@
void at91_serial0_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
- at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
+ at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
+ at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0);
}
void at91_serial1_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
- at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
+ at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
+ at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1);
}
void at91_serial2_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
- at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
+ at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
+ at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2);
}
void at91_serial3_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
- at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
+ at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
+ at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
}
@@ -78,71 +78,71 @@ void at91_serial_hw_init(void)
#ifdef CONFIG_HAS_DATAFLASH
void at91_spi0_hw_init(unsigned long cs_mask)
{
- at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
- at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
- at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
+ at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_A_periph(AT91_PIN_PA3, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_A_periph(AT91_PIN_PA4, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_A_periph(AT91_PIN_PA5, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_A_periph(AT91_PIN_PA6, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_gpio_output(AT91_PIN_PA4, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_gpio_output(AT91_PIN_PA5, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_gpio_output(AT91_PIN_PA6, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
}
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
- at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
- at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
- at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */
+ at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_A_periph(AT91_PIN_PB28, 1);
+ at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_B_periph(AT91_PIN_PA24, 1);
+ at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_B_periph(AT91_PIN_PA25, 1);
+ at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_A_periph(AT91_PIN_PA26, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_gpio_output(AT91_PIN_PB28, 1);
+ at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_gpio_output(AT91_PIN_PA24, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_gpio_output(AT91_PIN_PA25, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_gpio_output(AT91_PIN_PA26, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
}
}
#endif