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authorJens Scharsig <js_at_ng@scharsoft.de>2010-02-03 22:46:46 +0100
committerTom Rix <Tom.Rix@windriver.com>2010-02-12 12:31:54 -0600
commit7f9e8633ac9c846e7e4f867507cbd5de1bd99e0c (patch)
tree677e3131d7305d68882ff00c4e7177bff9a03d31 /cpu/arm926ejs/at91/at91sam9260_devices.c
parentea8fbba73184a40437bdeccd888cf448d5f1105e (diff)
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convert all at91 files to use at91_gpio driver syntax
* convert all files cpu/../at91 to use at91_gpio driver syntax * change AT91_PINP([A-F])(\d+) to AT91_PIO_PORT\1, \2 this makes all 160 AT91_PINPxxx defines obsolete * AT91_PINPxxx defines and gpio.h can be remove, if all boards converted to new SoC access Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Diffstat (limited to 'cpu/arm926ejs/at91/at91sam9260_devices.c')
-rw-r--r--cpu/arm926ejs/at91/at91sam9260_devices.c100
1 files changed, 50 insertions, 50 deletions
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/cpu/arm926ejs/at91/at91sam9260_devices.c
index f86cb99..68c1974 100644
--- a/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/cpu/arm926ejs/at91/at91sam9260_devices.c
@@ -30,29 +30,29 @@
void at91_serial0_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
- at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
+ at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */
+ at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD0 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
}
void at91_serial1_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
- at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
+ at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */
+ at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* RXD1 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
}
void at91_serial2_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
- at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
+ at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */
+ at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* RXD2 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
}
void at91_serial3_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
- at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
+ at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* DRXD */
+ at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
}
@@ -78,71 +78,71 @@ void at91_serial_hw_init(void)
#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
- at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
- at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
- at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
+ at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
if (cs_mask & (1 << 0)) {
- at91_set_A_periph(AT91_PIN_PA3, 1);
+ at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_B_periph(AT91_PIN_PC11, 1);
+ at91_set_b_periph(AT91_PIO_PORTC, 11, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_B_periph(AT91_PIN_PC16, 1);
+ at91_set_b_periph(AT91_PIO_PORTC, 16, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_B_periph(AT91_PIN_PC17, 1);
+ at91_set_b_periph(AT91_PIO_PORTC, 17, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_gpio_output(AT91_PIN_PA3, 1);
+ at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_gpio_output(AT91_PIN_PC11, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 11, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_gpio_output(AT91_PIN_PC16, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 16, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_gpio_output(AT91_PIN_PC17, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 17, 1);
}
}
void at91_spi1_hw_init(unsigned long cs_mask)
{
- at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
- at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
- at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
+ at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI1_MISO */
+ at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI1_MOSI */
+ at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI1_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
if (cs_mask & (1 << 0)) {
- at91_set_A_periph(AT91_PIN_PB3, 1);
+ at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 1)) {
- at91_set_B_periph(AT91_PIN_PC5, 1);
+ at91_set_b_periph(AT91_PIO_PORTC, 5, 1);
}
if (cs_mask & (1 << 2)) {
- at91_set_B_periph(AT91_PIN_PC4, 1);
+ at91_set_b_periph(AT91_PIO_PORTC, 4, 1);
}
if (cs_mask & (1 << 3)) {
- at91_set_gpio_output(AT91_PIN_PC3, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
}
if (cs_mask & (1 << 4)) {
- at91_set_gpio_output(AT91_PIN_PB3, 1);
+ at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
}
if (cs_mask & (1 << 5)) {
- at91_set_gpio_output(AT91_PIN_PC5, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 5, 1);
}
if (cs_mask & (1 << 6)) {
- at91_set_gpio_output(AT91_PIN_PC4, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 4, 1);
}
if (cs_mask & (1 << 7)) {
- at91_set_gpio_output(AT91_PIN_PC3, 1);
+ at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
}
}
#endif
@@ -150,35 +150,35 @@ void at91_spi1_hw_init(unsigned long cs_mask)
#ifdef CONFIG_MACB
void at91_macb_hw_init(void)
{
- at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
- at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
- at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
- at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
- at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
- at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
- at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
- at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
- at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
- at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
+ at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* ETXCK_EREFCK */
+ at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* ERXDV */
+ at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* ERX0 */
+ at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* ERX1 */
+ at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* ERXER */
+ at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* ETXEN */
+ at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* ETX0 */
+ at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* ETX1 */
+ at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* EMDIO */
+ at91_set_a_periph(AT91_PIO_PORTA, 20, 0); /* EMDC */
#ifndef CONFIG_RMII
- at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
- at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
- at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
- at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
- at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
+ at91_set_b_periph(AT91_PIO_PORTA, 28, 0); /* ECRS */
+ at91_set_b_periph(AT91_PIO_PORTA, 29, 0); /* ECOL */
+ at91_set_b_periph(AT91_PIO_PORTA, 25, 0); /* ERX2 */
+ at91_set_b_periph(AT91_PIO_PORTA, 26, 0); /* ERX3 */
+ at91_set_b_periph(AT91_PIO_PORTA, 27, 0); /* ERXCK */
#if defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AFEB9260)
/*
* use PA10, PA11 for ETX2, ETX3.
* PA23 and PA24 are for TWI EEPROM
*/
- at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
- at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
+ at91_set_b_periph(AT91_PIO_PORTA, 10, 0); /* ETX2 */
+ at91_set_b_periph(AT91_PIO_PORTA, 11, 0); /* ETX3 */
#else
- at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
- at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
+ at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */
+ at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */
#endif
- at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
+ at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */
#endif
}
#endif