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authorwdenk <wdenk>2003-07-16 21:53:01 +0000
committerwdenk <wdenk>2003-07-16 21:53:01 +0000
commit945af8d723a29e9b6289d84250745ed0dc16fc81 (patch)
tree6798d0b717c05b01742df0c410038c702b8a1979 /cpu/arm925t
parentcb4dbb7bbc271f988e14ec353a5e86d7f10e1da0 (diff)
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* Add support for IceCube board (with MGT5100 and MPC5200 CPUs)
* Add support for MGT5100 and MPC5200 processors
Diffstat (limited to 'cpu/arm925t')
-rw-r--r--cpu/arm925t/interrupts.c1
-rw-r--r--cpu/arm925t/omap925.c8
-rw-r--r--cpu/arm925t/start.S11
3 files changed, 9 insertions, 11 deletions
diff --git a/cpu/arm925t/interrupts.c b/cpu/arm925t/interrupts.c
index ed8a1c7..132af1a 100644
--- a/cpu/arm925t/interrupts.c
+++ b/cpu/arm925t/interrupts.c
@@ -85,7 +85,6 @@ int disable_interrupts (void)
#endif
-
void bad_mode (void)
{
panic ("Resetting CPU ...\n");
diff --git a/cpu/arm925t/omap925.c b/cpu/arm925t/omap925.c
index 1166ca6..ae62656 100644
--- a/cpu/arm925t/omap925.c
+++ b/cpu/arm925t/omap925.c
@@ -41,14 +41,14 @@ void gpiosetdir(ushort mask, ushort in)
void gpiosetout(ushort mask, ushort out)
{
ushort *r_ptr, r_val;
-
+
r_ptr = (ushort *)GPIO_DATA_OUTPUT_REG; /* set pointer */
r_val = *r_ptr & ~mask; /* get previous val, clear bits we want to change */
r_val |= (out & mask); /* set specified bits in value + plus origional ones */
- *r_ptr = r_val; /* write it out */
-/*
+ *r_ptr = r_val; /* write it out */
+/*
* gcc screwed this one up :(.
- *
+ *
* *(ushort *)GPIO_DATA_OUTPUT_REG = (*(ushort *)GPIO_DATA_OUTPUT_REG & ~mask) | (out & mask);
*/
diff --git a/cpu/arm925t/start.S b/cpu/arm925t/start.S
index 2115fb3..a9241bc 100644
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -31,7 +31,6 @@
*/
-
#include <config.h>
#include <version.h>
@@ -137,14 +136,14 @@ reset:
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
-
+
/*
* Set up 925T mode
*/
mov r1, #0x81 /* Set ARM925T configuration. */
mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
- /*
+ /*
* turn off the watchdog, unlock/diable sequence
*/
mov r1, #0xF5
@@ -162,9 +161,9 @@ reset:
ldr r0, =REG_IHL2_MIR
str r1, [r0]
- /*
+ /*
* wait for dpll to lock
- */
+ */
ldr r0, =CK_DPLL1
mov r1, #0x10
strh r1, [r0]
@@ -414,7 +413,7 @@ fiq:
.globl reset_cpu
reset_cpu:
ldr r1, rstctl1 /* get clkm1 reset ctl */
- mov r3, #0x0
+ mov r3, #0x0
strh r3, [r1] /* clear it */
mov r3, #0x8
strh r3, [r1] /* force dsp+arm reset */