diff options
author | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
commit | bb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch) | |
tree | 0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /cpu/arm920t | |
parent | a200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff) | |
parent | 4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff) | |
download | u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.zip u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.gz u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.bz2 |
Merge branch 'next' of ../next
Diffstat (limited to 'cpu/arm920t')
-rw-r--r-- | cpu/arm920t/a320/Makefile | 47 | ||||
-rw-r--r-- | cpu/arm920t/a320/ftsmc020.c | 51 | ||||
-rw-r--r-- | cpu/arm920t/a320/reset.S | 22 | ||||
-rw-r--r-- | cpu/arm920t/a320/timer.c | 193 | ||||
-rw-r--r-- | cpu/arm920t/at91rm9200/timer.c | 2 | ||||
-rw-r--r-- | cpu/arm920t/imx/timer.c | 2 | ||||
-rw-r--r-- | cpu/arm920t/ks8695/timer.c | 2 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/interrupts.c | 6 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/speed.c | 13 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/timer.c | 17 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/usb.c | 17 | ||||
-rw-r--r-- | cpu/arm920t/s3c24x0/usb_ohci.c | 11 | ||||
-rw-r--r-- | cpu/arm920t/start.S | 4 |
13 files changed, 336 insertions, 51 deletions
diff --git a/cpu/arm920t/a320/Makefile b/cpu/arm920t/a320/Makefile new file mode 100644 index 0000000..f030c53 --- /dev/null +++ b/cpu/arm920t/a320/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +SOBJS += reset.o +COBJS += timer.o +COBJS += ftsmc020.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm920t/a320/ftsmc020.c b/cpu/arm920t/a320/ftsmc020.c new file mode 100644 index 0000000..7646537 --- /dev/null +++ b/cpu/arm920t/a320/ftsmc020.c @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert@faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <config.h> +#include <common.h> +#include <asm/io.h> +#include <asm/arch/ftsmc020.h> + +struct ftsmc020_config { + unsigned int config; + unsigned int timing; +}; + +static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS; + +static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE; + +static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg) +{ + if (bank > 3) { + printf("bank # %u invalid\n", bank); + return; + } + + writel(cfg->config, &smc->bank[bank].cr); + writel(cfg->timing, &smc->bank[bank].tpr); +} + +void ftsmc020_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(config); i++) + ftsmc020_setup_bank(i, &config[i]); +} diff --git a/cpu/arm920t/a320/reset.S b/cpu/arm920t/a320/reset.S new file mode 100644 index 0000000..12ca527 --- /dev/null +++ b/cpu/arm920t/a320/reset.S @@ -0,0 +1,22 @@ +/* + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert@faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +.global reset_cpu +reset_cpu: + b reset_cpu diff --git a/cpu/arm920t/a320/timer.c b/cpu/arm920t/a320/timer.c new file mode 100644 index 0000000..bb65593 --- /dev/null +++ b/cpu/arm920t/a320/timer.c @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang <ratbert@faraday-tech.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/ftpmu010.h> +#include <asm/arch/fttmr010.h> + +static ulong timestamp; +static ulong lastdec; + +static struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; +static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + +#define TIMER_CLOCK 32768 +#define TIMER_LOAD_VAL 0xffffffff + +int timer_init(void) +{ + unsigned int oscc; + unsigned int cr; + + debug("%s()\n", __func__); + + /* disable timers */ + writel(0, &tmr->cr); + + /* + * use 32768Hz oscillator for RTC, WDT, TIMER + */ + + /* enable the 32768Hz oscillator */ + oscc = readl(&pmu->OSCC); + oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI); + writel(oscc, &pmu->OSCC); + + /* wait until ready */ + while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE)) + ; + + /* select 32768Hz oscillator */ + oscc = readl(&pmu->OSCC); + oscc |= FTPMU010_OSCC_OSCL_RTCLSEL; + writel(oscc, &pmu->OSCC); + + /* setup timer */ + writel(TIMER_LOAD_VAL, &tmr->timer3_load); + writel(TIMER_LOAD_VAL, &tmr->timer3_counter); + writel(0, &tmr->timer3_match1); + writel(0, &tmr->timer3_match2); + + /* we don't want timer to issue interrupts */ + writel(FTTMR010_TM3_MATCH1 | + FTTMR010_TM3_MATCH2 | + FTTMR010_TM3_OVERFLOW, + &tmr->interrupt_mask); + + cr = readl(&tmr->cr); + cr |= FTTMR010_TM3_CLOCK; /* use external clock */ + cr |= FTTMR010_TM3_ENABLE; + writel(cr, &tmr->cr); + + /* init the timestamp and lastdec value */ + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +/* + * reset time + */ +void reset_timer_masked(void) +{ + /* capure current decrementer value time */ + lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); + timestamp = 0; /* start "advancing" time stamp from 0 */ + + debug("%s(): lastdec = %lx\n", __func__, lastdec); +} + +void reset_timer(void) +{ + debug("%s()\n", __func__); + reset_timer_masked(); +} + +/* + * return timer ticks + */ +ulong get_timer_masked(void) +{ + /* current tick value */ + ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ); + + debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec); + + if (lastdec >= now) { + /* + * normal mode (non roll) + * move stamp fordward with absoulte diff ticks + */ + timestamp += lastdec - now; + } else { + /* + * we have overflow of the count down timer + * + * nts = ts + ld + (TLV - now) + * ts=old stamp, ld=time that passed before passing through -1 + * (TLV-now) amount of time after passing though -1 + * nts = new "advancing time stamp"...it could also roll and + * cause problems. + */ + timestamp += lastdec + TIMER_LOAD_VAL - now; + } + + lastdec = now; + + debug("%s() returns %lx\n", __func__, timestamp); + + return timestamp; +} + +/* + * return difference between timer ticks and base + */ +ulong get_timer(ulong base) +{ + debug("%s(%lx)\n", __func__, base); + return get_timer_masked() - base; +} + +void set_timer(ulong t) +{ + debug("%s(%lx)\n", __func__, t); + timestamp = t; +} + +/* delay x useconds AND perserve advance timstamp value */ +void udelay(unsigned long usec) +{ + long tmo = usec * (TIMER_CLOCK / 1000) / 1000; + unsigned long now, last = readl(&tmr->timer3_counter); + + debug("%s(%lu)\n", __func__, usec); + while (tmo > 0) { + now = readl(&tmr->timer3_counter); + if (now > last) /* count down timer overflow */ + tmo -= TIMER_LOAD_VAL + last - now; + else + tmo -= last - now; + last = now; + } +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + debug("%s()\n", __func__); + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + debug("%s()\n", __func__); + return CONFIG_SYS_HZ; +} diff --git a/cpu/arm920t/at91rm9200/timer.c b/cpu/arm920t/at91rm9200/timer.c index 235d107..9c54bbe 100644 --- a/cpu/arm920t/at91rm9200/timer.c +++ b/cpu/arm920t/at91rm9200/timer.c @@ -87,7 +87,7 @@ void set_timer (ulong t) timestamp = t; } -void udelay (unsigned long usec) +void __udelay (unsigned long usec) { udelay_masked(usec); } diff --git a/cpu/arm920t/imx/timer.c b/cpu/arm920t/imx/timer.c index 31ec588..b06b518 100644 --- a/cpu/arm920t/imx/timer.c +++ b/cpu/arm920t/imx/timer.c @@ -89,7 +89,7 @@ void udelay_masked (unsigned long usec) } while (diff >= 0); } -void udelay (unsigned long usec) +void __udelay (unsigned long usec) { udelay_masked(usec); } diff --git a/cpu/arm920t/ks8695/timer.c b/cpu/arm920t/ks8695/timer.c index 22987bc..886e370 100644 --- a/cpu/arm920t/ks8695/timer.c +++ b/cpu/arm920t/ks8695/timer.c @@ -81,7 +81,7 @@ void set_timer(ulong t) timer_ticks = t; } -void udelay(ulong usec) +void __udelay(ulong usec) { ulong start = get_timer_masked(); ulong end; diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c index 9148946..879fda6 100644 --- a/cpu/arm920t/s3c24x0/interrupts.c +++ b/cpu/arm920t/s3c24x0/interrupts.c @@ -31,11 +31,7 @@ #include <common.h> -#if defined(CONFIG_S3C2400) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif +#include <asm/arch/s3c24x0_cpu.h> #include <asm/proc-armv/ptrace.h> void do_irq (struct pt_regs *pt_regs) diff --git a/cpu/arm920t/s3c24x0/speed.c b/cpu/arm920t/s3c24x0/speed.c index 136c779..b13283a 100644 --- a/cpu/arm920t/s3c24x0/speed.c +++ b/cpu/arm920t/s3c24x0/speed.c @@ -30,15 +30,10 @@ */ #include <common.h> -#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) +#ifdef CONFIG_S3C24X0 #include <asm/io.h> - -#if defined(CONFIG_S3C2400) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif +#include <asm/arch/s3c24x0_cpu.h> #define MPLL 0 #define UPLL 1 @@ -100,6 +95,4 @@ ulong get_UCLK(void) return get_PLLCLK(UPLL); } -#endif /* defined(CONFIG_S3C2400) || - defined (CONFIG_S3C2410) || - defined (CONFIG_TRAB) */ +#endif /* CONFIG_S3C24X0 */ diff --git a/cpu/arm920t/s3c24x0/timer.c b/cpu/arm920t/s3c24x0/timer.c index a27f0e2..7d47354 100644 --- a/cpu/arm920t/s3c24x0/timer.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -30,17 +30,10 @@ */ #include <common.h> -#if defined(CONFIG_S3C2400) || \ - defined(CONFIG_S3C2410) || \ - defined(CONFIG_TRAB) +#ifdef CONFIG_S3C24X0 #include <asm/io.h> - -#if defined(CONFIG_S3C2400) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif +#include <asm/arch/s3c24x0_cpu.h> int timer_load_val = 0; static ulong timer_clk; @@ -106,7 +99,7 @@ void set_timer(ulong t) timestamp = t; } -void udelay(unsigned long usec) +void __udelay (unsigned long usec) { ulong tmo; ulong start = get_ticks(); @@ -227,6 +220,4 @@ void reset_cpu(ulong ignored) /*NOTREACHED*/ } -#endif /* defined(CONFIG_S3C2400) || - defined (CONFIG_S3C2410) || - defined (CONFIG_TRAB) */ +#endif /* CONFIG_S3C24X0 */ diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c index b5ba8c4..e468ed0 100644 --- a/cpu/arm920t/s3c24x0/usb.c +++ b/cpu/arm920t/s3c24x0/usb.c @@ -23,15 +23,11 @@ #include <common.h> -#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) -# if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) - -#if defined(CONFIG_S3C2400) -# include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -# include <s3c2410.h> -#endif +#if defined(CONFIG_USB_OHCI_NEW) && \ + defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \ + defined(CONFIG_S3C24X0) +#include <asm/arch/s3c24x0_cpu.h> #include <asm/io.h> int usb_cpu_init(void) @@ -70,5 +66,6 @@ int usb_cpu_init_fail(void) return 0; } -# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */ -#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */ +#endif /* defined(CONFIG_USB_OHCI_NEW) && \ + defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \ + defined(CONFIG_S3C24X0) */ diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c index 7672e4c..5aa8d64 100644 --- a/cpu/arm920t/s3c24x0/usb_ohci.c +++ b/cpu/arm920t/s3c24x0/usb_ohci.c @@ -36,14 +36,9 @@ #include <common.h> /* #include <pci.h> no PCI on the S3C24X0 */ -#ifdef CONFIG_USB_OHCI - -#if defined(CONFIG_S3C2400) -#include <s3c2400.h> -#elif defined(CONFIG_S3C2410) -#include <s3c2410.h> -#endif +#if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0) +#include <asm/arch/s3c24x0_cpu.h> #include <asm/io.h> #include <malloc.h> #include <usb.h> @@ -1757,4 +1752,4 @@ int usb_lowlevel_stop(void) return 0; } -#endif /* CONFIG_USB_OHCI */ +#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0) */ diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 114427a..779f192 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -131,7 +131,7 @@ copyex: bne copyex #endif -#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) +#ifdef CONFIG_S3C24X0 /* turn off the watchdog */ # if defined(CONFIG_S3C2400) @@ -166,7 +166,7 @@ copyex: ldr r0, =CLKDIVN mov r1, #3 str r1, [r0] -#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */ +#endif /* CONFIG_S3C24X0 */ /* * we do sys-critical inits only at reboot, |