summaryrefslogtreecommitdiff
path: root/cpu/arm920t
diff options
context:
space:
mode:
authorWolfgang Denk <wd@pollux.denx.de>2005-10-05 02:02:25 +0200
committerWolfgang Denk <wd@pollux.denx.de>2005-10-05 02:02:25 +0200
commit3b9dfddfd8fc7d6639e6d746774ca7af77dfd881 (patch)
treea2552b0b24135f17e0110d7d74823b6db2e71018 /cpu/arm920t
parent645da510979b839196567506e8b2f33ba4cc8140 (diff)
downloadu-boot-imx-3b9dfddfd8fc7d6639e6d746774ca7af77dfd881.zip
u-boot-imx-3b9dfddfd8fc7d6639e6d746774ca7af77dfd881.tar.gz
u-boot-imx-3b9dfddfd8fc7d6639e6d746774ca7af77dfd881.tar.bz2
Set the AT91RM9200 clock to synchronous mode
Patch by Anders Larsen, 29 Apr 2005
Diffstat (limited to 'cpu/arm920t')
-rw-r--r--cpu/arm920t/at91rm9200/lowlevel_init.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S
index 05887ad..6941d42 100644
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/cpu/arm920t/at91rm9200/lowlevel_init.S
@@ -123,6 +123,11 @@ LoopOsc:
cmp r2, r0
bne 2b
+ /* switch from FastBus to Synchronous clock mode */
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #0x40000000 @ set bit 30 (nF) notFastBus
+ mcr p15, 0, r0, c1, c0, 0
+
/* everything is fine now */
mov pc, lr