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| author | Andy Fleming <afleming@freescale.com> | 2007-02-24 01:16:45 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-04-23 19:58:28 -0500 |
| commit | 9343dbf85bc03033f2102d8e8543567c2c1ad2d2 (patch) | |
| tree | 94edfc80e63eb36793f6feed2c46339e0cfb9cce /cpu/arm920t/s3c24x0 | |
| parent | 85e7c7a45e3dd9c7ce3e722352ba60f8df1a7a4b (diff) | |
| download | u-boot-imx-9343dbf85bc03033f2102d8e8543567c2c1ad2d2.zip u-boot-imx-9343dbf85bc03033f2102d8e8543567c2c1ad2d2.tar.gz u-boot-imx-9343dbf85bc03033f2102d8e8543567c2c1ad2d2.tar.bz2 | |
Tweak DDR ECC error counter
Enable single-bit error counter when memory was cleared by ddr controller.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'cpu/arm920t/s3c24x0')
0 files changed, 0 insertions, 0 deletions