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authorwdenk <wdenk>2004-10-09 22:21:29 +0000
committerwdenk <wdenk>2004-10-09 22:21:29 +0000
commit1d9f410500f32b04b18b176386e77afacda7acfb (patch)
treec381f275ad04efac5da30ec72c14016b09437135 /cpu/arm920t/s3c24x0/serial.c
parent3e01d75ff25b3668191beb86ab32cb2d1fb7f73b (diff)
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Patch by Steven Scholz, 16 Aug 2004:
- Introducing the concept of SoCs "./cpu/$(CPU)/$(SOC)" - creating subdirs for SoCs ./cpu/arm920t/imx and ./cpu/arm920t/s3c24x0 - moving SoC specific code out of cpu/arm920t/ into cpu/arm920t/$(SOC)/ - moving drivers/s3c24x0_i2c.c and drivers/serial_imx.c out of drivers/ into cpu/arm920t/$(SOC)/
Diffstat (limited to 'cpu/arm920t/s3c24x0/serial.c')
-rw-r--r--cpu/arm920t/s3c24x0/serial.c182
1 files changed, 182 insertions, 0 deletions
diff --git a/cpu/arm920t/s3c24x0/serial.c b/cpu/arm920t/s3c24x0/serial.c
new file mode 100644
index 0000000..8327443
--- /dev/null
+++ b/cpu/arm920t/s3c24x0/serial.c
@@ -0,0 +1,182 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#if defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB)
+
+#if defined(CONFIG_S3C2400) || defined(CONFIG_TRAB)
+#include <s3c2400.h>
+#elif defined(CONFIG_S3C2410)
+#include <s3c2410.h>
+#endif
+
+#ifdef CONFIG_SERIAL1
+#define UART_NR S3C24X0_UART0
+
+#elif defined(CONFIG_SERIAL2)
+# if defined(CONFIG_TRAB)
+# error "TRAB supports only CONFIG_SERIAL1"
+# endif
+#define UART_NR S3C24X0_UART1
+
+#elif defined(CONFIG_SERIAL3)
+# if defined(CONFIG_TRAB)
+# #error "TRAB supports only CONFIG_SERIAL1"
+# endif
+#define UART_NR S3C24X0_UART2
+
+#else
+#error "Bad: you didn't configure serial ..."
+#endif
+
+void serial_setbrg (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+ S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+ int i;
+ unsigned int reg = 0;
+
+ /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
+ reg = get_PCLK() / (16 * gd->baudrate) - 1;
+
+ /* FIFO enable, Tx/Rx FIFO clear */
+ uart->UFCON = 0x07;
+ uart->UMCON = 0x0;
+ /* Normal,No parity,1 stop,8 bit */
+ uart->ULCON = 0x3;
+ /*
+ * tx=level,rx=edge,disable timeout int.,enable rx error int.,
+ * normal,interrupt or polling
+ */
+ uart->UCON = 0x245;
+ uart->UBRDIV = reg;
+
+#ifdef CONFIG_HWFLOW
+ uart->UMCON = 0x1; /* RTS up */
+#endif
+ for (i = 0; i < 100; i++);
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init (void)
+{
+ serial_setbrg ();
+
+ return (0);
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc (void)
+{
+ S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+
+ /* wait for character to arrive */
+ while (!(uart->UTRSTAT & 0x1));
+
+ return uart->URXH & 0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow = 0; /* turned off by default */
+int hwflow_onoff(int on)
+{
+ switch(on) {
+ case 0:
+ default:
+ break; /* return current */
+ case 1:
+ hwflow = 1; /* turn on */
+ break;
+ case -1:
+ hwflow = 0; /* turn off */
+ break;
+ }
+ return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet = 0;
+void disable_putc(void)
+{
+ be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+ be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc (const char c)
+{
+ S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+#ifdef CONFIG_MODEM_SUPPORT
+ if (be_quiet)
+ return;
+#endif
+
+ /* wait for room in the tx FIFO */
+ while (!(uart->UTRSTAT & 0x2));
+
+#ifdef CONFIG_HWFLOW
+ /* Wait for CTS up */
+ while(hwflow && !(uart->UMSTAT & 0x1))
+ ;
+#endif
+
+ uart->UTXH = c;
+
+ /* If \n, also do \r */
+ if (c == '\n')
+ serial_putc ('\r');
+}
+
+/*
+ * Test whether a character is in the RX buffer
+ */
+int serial_tstc (void)
+{
+ S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+
+ return uart->UTRSTAT & 0x1;
+}
+
+void
+serial_puts (const char *s)
+{
+ while (*s) {
+ serial_putc (*s++);
+ }
+}
+
+#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */