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authorWolfgang Denk <wd@pollux.denx.de>2005-10-05 02:06:08 +0200
committerWolfgang Denk <wd@pollux.denx.de>2005-10-05 02:06:08 +0200
commitc0e82d5016924b446bd5542045854aa0e109fe80 (patch)
tree25f32c44a0d9c90ec0c6ece523e81e68fcb99a65 /cpu/arm920t/at91rm9200/lowlevel_init.S
parent3b9dfddfd8fc7d6639e6d746774ca7af77dfd881 (diff)
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Set the AT91RM9200 clock to asynchronous mode
Patch by Anders Larsen, 03 May 2005
Diffstat (limited to 'cpu/arm920t/at91rm9200/lowlevel_init.S')
-rw-r--r--cpu/arm920t/at91rm9200/lowlevel_init.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S
index 6941d42..1902bd0 100644
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/cpu/arm920t/at91rm9200/lowlevel_init.S
@@ -123,9 +123,9 @@ LoopOsc:
cmp r2, r0
bne 2b
- /* switch from FastBus to Synchronous clock mode */
+ /* switch from FastBus to Asynchronous clock mode */
mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #0x40000000 @ set bit 30 (nF) notFastBus
+ orr r0, r0, #0xC0000000 @ set bit 31 (iA) and 30 (nF)
mcr p15, 0, r0, c1, c0, 0
/* everything is fine now */