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| author | Magnus Lilja <lilja.magnus@gmail.com> | 2009-06-13 20:50:01 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-06-21 16:18:12 +0200 |
| commit | 40c642bc19b9fa2906e3172487a522fee456340b (patch) | |
| tree | 9c4189f076f5eddcf4e712f5ec15f98be2764df6 /cpu/arm1136 | |
| parent | df81238b3e27a791da996a9208402ac8f40b9862 (diff) | |
| download | u-boot-imx-40c642bc19b9fa2906e3172487a522fee456340b.zip u-boot-imx-40c642bc19b9fa2906e3172487a522fee456340b.tar.gz u-boot-imx-40c642bc19b9fa2906e3172487a522fee456340b.tar.bz2 | |
MX31: Add NAND SPL for i.MX31.
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.
It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.
Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).
The patch is based on the work by Maxim Artamonov.
Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Diffstat (limited to 'cpu/arm1136')
| -rw-r--r-- | cpu/arm1136/start.S | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index 28cb5fd..957f438 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -200,12 +200,15 @@ clbss_l:str r2, [r0] /* clear loop... */ ldr pc, _start_armboot +#ifdef CONFIG_NAND_SPL +_start_armboot: .word nand_boot +#else #ifdef CONFIG_ONENAND_IPL _start_armboot: .word start_oneboot #else _start_armboot: .word start_armboot -#endif - +#endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_NAND_SPL */ /* ************************************************************************* @@ -217,6 +220,7 @@ _start_armboot: .word start_armboot * ************************************************************************* */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: /* * flush v4 I/D caches @@ -243,6 +247,7 @@ cpu_init_crit: bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #ifndef CONFIG_PRELOADER /* |