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authorStefan Roese <sr@denx.de>2014-11-07 14:10:41 +0100
committerMarek Vasut <marex@denx.de>2014-11-07 15:58:31 +0100
commit51c580c6c92c01884f520f4ffaeb6885ee8e666e (patch)
treec4bac3ab6e91290d48d81b661e9be37d205fdc12 /configs
parent116f5d5baa5d6ff3f244896b5a7c59ad59c71f87 (diff)
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arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target
This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs')
-rw-r--r--configs/socfpga_socrates_defconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
new file mode 100644
index 0000000..0f3896d
--- /dev/null
+++ b/configs/socfpga_socrates_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SPL=y
++S:CONFIG_ARM=y
++S:CONFIG_TARGET_SOCFPGA_CYCLONE5=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"