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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-10-03 20:03:03 +0900 |
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committer | Scott Wood <scottwood@freescale.com> | 2014-10-09 17:33:24 -0500 |
commit | 05968e7cfd5dcc50cfe51d03d119a5e9d77bd07c (patch) | |
tree | 3e3b85095f496c7e2edb972316dfd377b29d88cd /configs/P1010RDB-PB_SPIFLASH_defconfig | |
parent | dd0204e48d05f41480743a798b94d5484b664639 (diff) | |
download | u-boot-imx-05968e7cfd5dcc50cfe51d03d119a5e9d77bd07c.zip u-boot-imx-05968e7cfd5dcc50cfe51d03d119a5e9d77bd07c.tar.gz u-boot-imx-05968e7cfd5dcc50cfe51d03d119a5e9d77bd07c.tar.bz2 |
mtd: denali: fix NAND_CMD_PARAM command
NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.
Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.
In addition, unnecessary clear_interrupts() should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'configs/P1010RDB-PB_SPIFLASH_defconfig')
0 files changed, 0 insertions, 0 deletions