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authorYork Sun <yorksun@freescale.com>2015-01-06 13:18:47 -0800
committerYork Sun <yorksun@freescale.com>2015-02-24 13:09:06 -0800
commit9955b4ab0187e0e9faac57acc01ebe7714d0ec23 (patch)
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parent1f3402e7291afa3ba0a5f4da72640edaf2f65405 (diff)
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driver/ddr/fsl: Add workaround for A008336
Erratum A008336 requires setting EDDRTQCR1[2] in DDRC DCSR space for 64-bit DDR controllers. Signed-off-by: York Sun <yorksun@freescale.com>
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