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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-03-30 17:01:05 -0500 |
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committer | Marek Vasut <marex@denx.de> | 2015-04-21 12:23:16 +0200 |
commit | 0812a1d3e5d056b012d6a9b4b2e83469440f7018 (patch) | |
tree | 45d4979a52bb5f62d9e95d0d178df967090b78ab /configs/M5329BFEE_defconfig | |
parent | c218f85ea18d57beecc36a3460f08e929d81fcd6 (diff) | |
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arm: socfpga: spl: enable sdram, timer and uart
Add the calls in the spl_board_init to enable SDRAM, timer, and UART.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'configs/M5329BFEE_defconfig')
0 files changed, 0 insertions, 0 deletions