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authorHeiko Schocher <hs@denx.de>2014-10-31 08:31:03 +0100
committerTom Rini <trini@ti.com>2014-11-17 08:47:17 -0500
commit667af36905157b65fd79493e7f821db606ebbd33 (patch)
tree10f5fec7d716ad5e96ad0a084ef8a3258ed205be /configs/BSC9132QDS_NAND_DDRCLK133_defconfig
parent4dfd36058955550d4a82787a3d2e548faf404f73 (diff)
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spl, mtd, nand, atmel_nand: invert device ready pin logic
device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'configs/BSC9132QDS_NAND_DDRCLK133_defconfig')
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