diff options
author | Tom Rini <trini@ti.com> | 2013-03-04 09:44:42 -0500 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-03-04 09:44:42 -0500 |
commit | c259188b203d95e4a854e7e29b9e4472cc982f65 (patch) | |
tree | 5d6f8ad0cac59dffd345308cd9095789a03024a4 /common | |
parent | 28786eb960a8def9f2bd321c488c71ce96166ae3 (diff) | |
parent | 9faf4f08e752ca95d0986a200d48b67b59cde5ef (diff) | |
download | u-boot-imx-c259188b203d95e4a854e7e29b9e4472cc982f65.zip u-boot-imx-c259188b203d95e4a854e7e29b9e4472cc982f65.tar.gz u-boot-imx-c259188b203d95e4a854e7e29b9e4472cc982f65.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Diffstat (limited to 'common')
-rw-r--r-- | common/cmd_reginfo.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c index 08a6563..b591bd3 100644 --- a/common/cmd_reginfo.c +++ b/common/cmd_reginfo.c @@ -191,7 +191,7 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc, #elif defined(CONFIG_BLACKFIN) puts("\nSystem Configuration registers\n"); - +#ifndef __ADSPBF60x__ puts("\nPLL Registers\n"); printf("\tPLL_DIV: 0x%04x PLL_CTL: 0x%04x\n", bfin_read_PLL_DIV(), bfin_read_PLL_CTL()); @@ -227,7 +227,24 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc, printf("\tEBIU_SDSTAT: 0x%04x EBIU_SDGCTL: 0x%08x\n", bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL()); # endif +#else + puts("\nCGU Registers\n"); + printf("\tCGU_DIV: 0x%08x CGU_CTL: 0x%08x\n", + bfin_read_CGU_DIV(), bfin_read_CGU_CTL()); + printf("\tCGU_STAT: 0x%08x CGU_LOCKCNT: 0x%08x\n", + bfin_read_CGU_STAT(), bfin_read_CGU_CLKOUTSEL()); + puts("\nSMC DDR Registers\n"); + printf("\tDDR_CFG: 0x%08x DDR_TR0: 0x%08x\n", + bfin_read_DMC0_CFG(), bfin_read_DMC0_TR0()); + printf("\tDDR_TR1: 0x%08x DDR_TR2: 0x%08x\n", + bfin_read_DMC0_TR1(), bfin_read_DMC0_TR2()); + printf("\tDDR_MR: 0x%08x DDR_EMR1: 0x%08x\n", + bfin_read_DMC0_MR(), bfin_read_DMC0_EMR1()); + printf("\tDDR_CTL: 0x%08x DDR_STAT: 0x%08x\n", + bfin_read_DMC0_CTL(), bfin_read_DMC0_STAT()); + printf("\tDDR_DLLCTL:0x%08x\n", bfin_read_DMC0_DLLCTL()); +#endif #endif /* CONFIG_BLACKFIN */ return 0; |