summaryrefslogtreecommitdiff
path: root/common
diff options
context:
space:
mode:
authorwdenk <wdenk>2004-03-14 18:23:55 +0000
committerwdenk <wdenk>2004-03-14 18:23:55 +0000
commit855a496fe9ba431772f1ff1aef21a5c001288bb0 (patch)
tree67ce44a0170787acf0da735beba5c5a0a7959398 /common
parent4b248f3f71dc867b0b636b137b044cc762b68486 (diff)
downloadu-boot-imx-855a496fe9ba431772f1ff1aef21a5c001288bb0.zip
u-boot-imx-855a496fe9ba431772f1ff1aef21a5c001288bb0.tar.gz
u-boot-imx-855a496fe9ba431772f1ff1aef21a5c001288bb0.tar.bz2
* Patches by Travis Sawyer, 12 Mar 2004:
- Fix Gigabit Ethernet support for 440GX - Add Gigabit Ethernet Support to MII PHY utilities * Patch by Brad Kemp, 12 Mar 2004: Fixes for drivers/cfi_flash.c: - Better support for x8/x16 implementations - Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE - Added defines for AMD command and address constants * Patch by Leon Kukovec, 12 Mar 2004: Fix get_dentfromdir() to correctly handle deleted dentries * Patch by George G. Davis, 11 Mar 2004: Remove hard coded network settings in TI OMAP1610 H2 default board config * Patch by George G. Davis, 11 Mar 2004: add support for ADS GraphicsClient+ board.
Diffstat (limited to 'common')
-rw-r--r--common/cmd_mii.c2
-rw-r--r--common/miiphyutil.c25
2 files changed, 25 insertions, 2 deletions
diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index abbdaa2..cbad7db 100644
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -103,7 +103,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
"Rev = 0x%02X, "
"%3dbaseT, %s\n",
j, oui, model, rev,
- miiphy_speed (j) == _100BASET ? 100 : 10,
+ miiphy_speed (j),
miiphy_duplex (j) == FULL ? "FDX" : "HDX");
}
}
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 03964da..b45ab06 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -135,11 +135,20 @@ int miiphy_speed (unsigned char addr)
{
unsigned short reg;
+ if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
+ printf ("PHY 1000BT Status read failed\n");
+ } else {
+ if (reg != 0xFFFF) {
+ if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
+ return (_1000BASET);
+ }
+ }
+ }
+
if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
printf ("PHY speed1 read failed, assuming 10bT\n");
return (_10BASET);
}
-
if ((reg & PHY_ANLPAR_100) != 0) {
return (_100BASET);
} else {
@@ -156,6 +165,20 @@ int miiphy_duplex (unsigned char addr)
{
unsigned short reg;
+
+ if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
+ printf ("PHY 1000BT Status read failed\n");
+ } else {
+ if ( (reg != 0xFFFF) &&
+ (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
+ if ((reg & PHY_1000BTSR_1000FD) !=0) {
+ return (FULL);
+ } else {
+ return (HALF);
+ }
+ }
+ }
+
if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
printf ("PHY duplex read failed, assuming half duplex\n");
return (HALF);