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author | Wolfgang Denk <wd@denx.de> | 2008-03-18 22:15:58 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-03-18 22:15:58 +0100 |
commit | fdeb932b1c8a3b615463995c3452d30ee0b12a33 (patch) | |
tree | e753cbcf649c67445b8c0359d9656fea26a84a4b /common | |
parent | 3515fd18d4e8e44f863ac7142b55e22b109e9af2 (diff) | |
parent | 1f2a9970109cebf7446e0503b10b71f8673045ee (diff) | |
download | u-boot-imx-fdeb932b1c8a3b615463995c3452d30ee0b12a33.zip u-boot-imx-fdeb932b1c8a3b615463995c3452d30ee0b12a33.tar.gz u-boot-imx-fdeb932b1c8a3b615463995c3452d30ee0b12a33.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin
Diffstat (limited to 'common')
-rw-r--r-- | common/Makefile | 2 | ||||
-rw-r--r-- | common/cmd_bootldr.c | 64 | ||||
-rw-r--r-- | common/cmd_cplbinfo.c | 59 |
3 files changed, 125 insertions, 0 deletions
diff --git a/common/Makefile b/common/Makefile index a88d1ef..56d0581 100644 --- a/common/Makefile +++ b/common/Makefile @@ -37,9 +37,11 @@ COBJS-$(CONFIG_CMD_BDI) += cmd_bdinfo.o COBJS-$(CONFIG_CMD_BEDBUG) += cmd_bedbug.o COBJS-$(CONFIG_CMD_BMP) += cmd_bmp.o COBJS-y += cmd_boot.o +COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o COBJS-y += cmd_bootm.o COBJS-$(CONFIG_CMD_CACHE) += cmd_cache.o COBJS-$(CONFIG_CMD_CONSOLE) += cmd_console.o +COBJS-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o COBJS-$(CONFIG_CMD_DATE) += cmd_date.o ifdef CONFIG_4xx COBJS-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o diff --git a/common/cmd_bootldr.c b/common/cmd_bootldr.c new file mode 100644 index 0000000..e6474aa --- /dev/null +++ b/common/cmd_bootldr.c @@ -0,0 +1,64 @@ +/* + * U-boot - bootldr.c + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * Licensed under the GPL-2 or later. + */ + +#include <config.h> +#include <common.h> +#include <command.h> + +#include <asm/blackfin.h> +#include <asm/mach-common/bits/bootrom.h> + +/* + * the bootldr command loads an address, checks to see if there + * is a Boot stream that the on-chip BOOTROM can understand, + * and loads it via the BOOTROM Callback. It is possible + * to also add booting from SPI, or TWI, but this function does + * not currently support that. + */ + +int do_bootldr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + void *addr; + uint32_t *data; + + /* Get the address */ + if (argc < 2) + addr = (void *)load_addr; + else + addr = (void *)simple_strtoul(argv[1], NULL, 16); + + /* Check if it is a LDR file */ + data = addr; +#if defined(__ADSPBF54x__) || defined(__ADSPBF52x__) + if ((*data & 0xFF000000) == 0xAD000000 && data[2] == 0x00000000) { +#else + if (*data == 0xFF800060 || *data == 0xFF800040 || *data == 0xFF800020) { +#endif + /* We want to boot from FLASH or SDRAM */ + printf("## Booting ldr image at 0x%p ...\n", addr); + + icache_disable(); + dcache_disable(); + + __asm__( + "jump (%1);" + : + : "q7" (addr), "a" (_BOOTROM_MEMBOOT)); + } else + printf("## No ldr image at address 0x%p\n", addr); + + return 0; +} + +U_BOOT_CMD(bootldr, 2, 0, do_bootldr, + "bootldr - boot ldr image from memory\n", + "[addr]\n" + " - boot ldr image stored in memory\n"); diff --git a/common/cmd_cplbinfo.c b/common/cmd_cplbinfo.c new file mode 100644 index 0000000..b2bbec1 --- /dev/null +++ b/common/cmd_cplbinfo.c @@ -0,0 +1,59 @@ +/* + * cmd_cplbinfo.c - dump the instruction/data cplb tables + * + * Copyright (c) 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> +#include <asm/blackfin.h> +#include <asm/cplb.h> +#include <asm/mach-common/bits/mpu.h> + +/* + * Translate the PAGE_SIZE bits into a human string + */ +static const char *cplb_page_size(uint32_t data) +{ + static const char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" }; + return page_size_string_table[(data & PAGE_SIZE_MASK) >> PAGE_SIZE_SHIFT]; +} + +/* + * show a hardware cplb table + */ +static void show_cplb_table(uint32_t *addr, uint32_t *data) +{ + size_t i; + printf(" Address Data Size Valid Locked\n"); + for (i = 1; i <= 16; ++i) { + printf(" %2i 0x%p 0x%05X %s %c %c\n", + i, *addr, *data, + cplb_page_size(*data), + (*data & CPLB_VALID ? 'Y' : 'N'), + (*data & CPLB_LOCK ? 'Y' : 'N')); + ++addr; + ++data; + } +} + +/* + * display current instruction and data cplb tables + */ +int do_cplbinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + printf("%s CPLB table [%08x]:\n", "Instruction", *(uint32_t *)DMEM_CONTROL); + show_cplb_table((uint32_t *)ICPLB_ADDR0, (uint32_t *)ICPLB_DATA0); + + printf("%s CPLB table [%08x]:\n", "Data", *(uint32_t *)IMEM_CONTROL); + show_cplb_table((uint32_t *)DCPLB_ADDR0, (uint32_t *)DCPLB_DATA0); + + return 0; +} + +U_BOOT_CMD(cplbinfo, 1, 0, do_cplbinfo, + "cplbinfo- display current CPLB tables\n", + "\n" + " - display current CPLB tables\n"); |