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| author | Wolfgang Denk <wd@denx.de> | 2007-11-17 01:30:40 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-11-17 01:30:40 +0100 |
| commit | 6ecbb7a3fa9b0940ed33e490d195d4b6830b2422 (patch) | |
| tree | f0d1454732f4c18d24a9679e555da37b41cf2c42 /common | |
| parent | d08b7233bc252faad8339e7ca0ddfd62fa79903c (diff) | |
| download | u-boot-imx-6ecbb7a3fa9b0940ed33e490d195d4b6830b2422.zip u-boot-imx-6ecbb7a3fa9b0940ed33e490d195d4b6830b2422.tar.gz u-boot-imx-6ecbb7a3fa9b0940ed33e490d195d4b6830b2422.tar.bz2 | |
Fix a bug in the slave serial programming mode for the Xilinx
Spartan2/3 FPGAs. The old code used "< 0" on a "char" type to test if
the most significant bit was set, which did not work on any
architecture where "char" defaulted to be an unsigned type.
Based on a patch by Angelos Manousaridis <amanous@inaccessnetworks.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'common')
| -rw-r--r-- | common/spartan2.c | 2 | ||||
| -rw-r--r-- | common/spartan3.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/common/spartan2.c b/common/spartan2.c index 0fb23b6..06550b9 100644 --- a/common/spartan2.c +++ b/common/spartan2.c @@ -516,7 +516,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->clk) (FALSE, TRUE, cookie); CONFIG_FPGA_DELAY (); /* Write data */ - (*fn->wr) ((val < 0), TRUE, cookie); + (*fn->wr) ((val & 0x80), TRUE, cookie); CONFIG_FPGA_DELAY (); /* Assert the clock */ (*fn->clk) (TRUE, TRUE, cookie); diff --git a/common/spartan3.c b/common/spartan3.c index c0f2b05..f7c4f8c 100644 --- a/common/spartan3.c +++ b/common/spartan3.c @@ -521,7 +521,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->clk) (FALSE, TRUE, cookie); CONFIG_FPGA_DELAY (); /* Write data */ - (*fn->wr) ((val < 0), TRUE, cookie); + (*fn->wr) ((val & 0x80), TRUE, cookie); CONFIG_FPGA_DELAY (); /* Assert the clock */ (*fn->clk) (TRUE, TRUE, cookie); |