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authorYork Sun <yorksun@freescale.com>2014-03-27 17:54:47 -0700
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:48 -0700
commit34e026f9b1eb3bcffb38e7787c2e6eac0e88ba85 (patch)
treef155ebdbac95a5ef637e7796ad22935029a56ce6 /common/ddr_spd.c
parent8d451a7129ee6820cc126c77f0f0a175a2cb2e8d (diff)
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driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'common/ddr_spd.c')
-rw-r--r--common/ddr_spd.c45
1 files changed, 44 insertions, 1 deletions
diff --git a/common/ddr_spd.c b/common/ddr_spd.c
index 7a388bb..438e71a 100644
--- a/common/ddr_spd.c
+++ b/common/ddr_spd.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008-2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -116,3 +116,46 @@ ddr3_spd_check(const ddr3_spd_eeprom_t *spd)
return 1;
}
}
+
+unsigned int ddr4_spd_check(const struct ddr4_spd_eeprom_s *spd)
+{
+ char *p = (char *)spd;
+ int csum16;
+ int len;
+ char crc_lsb; /* byte 126 */
+ char crc_msb; /* byte 127 */
+
+ len = 126;
+ csum16 = crc16(p, len);
+
+ crc_lsb = (char) (csum16 & 0xff);
+ crc_msb = (char) (csum16 >> 8);
+
+ if (spd->crc[0] != crc_lsb || spd->crc[1] != crc_msb) {
+ printf("SPD checksum unexpected.\n"
+ "Checksum lsb in SPD = %02X, computed SPD = %02X\n"
+ "Checksum msb in SPD = %02X, computed SPD = %02X\n",
+ spd->crc[0], crc_lsb, spd->crc[1], crc_msb);
+ return 1;
+ }
+
+ p = (char *)((ulong)spd + 128);
+ len = 126;
+ csum16 = crc16(p, len);
+
+ crc_lsb = (char) (csum16 & 0xff);
+ crc_msb = (char) (csum16 >> 8);
+
+ if (spd->mod_section.uc[126] != crc_lsb ||
+ spd->mod_section.uc[127] != crc_msb) {
+ printf("SPD checksum unexpected.\n"
+ "Checksum lsb in SPD = %02X, computed SPD = %02X\n"
+ "Checksum msb in SPD = %02X, computed SPD = %02X\n",
+ spd->mod_section.uc[126],
+ crc_lsb, spd->mod_section.uc[127],
+ crc_msb);
+ return 1;
+ }
+
+ return 0;
+}