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author | Tom Rini <trini@ti.com> | 2012-07-15 22:14:24 +0000 |
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committer | Marek Vasut <marex@denx.de> | 2012-07-18 14:43:29 +0200 |
commit | 71c5de4f4af5e0995f89dffa79f48f26bd095f50 (patch) | |
tree | 404ca9d37ccb271ccaf370e5eff5807c34bd90be /common/ddr_spd.c | |
parent | c7701af59f011e39f52647620a71cc6f2f551d2d (diff) | |
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ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum. We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here
as we are not allowed to have tests inside of align(...).
Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Diffstat (limited to 'common/ddr_spd.c')
0 files changed, 0 insertions, 0 deletions